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SN74BCT2952NT PDF预览

SN74BCT2952NT

更新时间: 2024-11-14 20:10:07
品牌 Logo 应用领域
德州仪器 - TI 信息通信管理光电二极管逻辑集成电路
页数 文件大小 规格书
5页 78K
描述
Octal Registered Bus Transceivers 24-PDIP 0 to 70

SN74BCT2952NT 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP24,.3针数:24
Reach Compliance Code:not_compliant风险等级:5.92
其他特性:CLOCK ENABLE; IOL = 24MA @ VOL = 0.5V & IOH = 3MA @ VOH = 2.4V FOR PORT A控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONAL系列:BCT/FBT
JESD-30 代码:R-PDIP-T24长度:31.64 mm
负载电容(CL):50 pF逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.064 A位数:8
功能数量:1端口数量:2
端子数量:24最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP24,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):55 mAProp。Delay @ Nom-Sup:10.5 ns
传播延迟(tpd):10.5 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:BICMOS温度等级:COMMERCIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A触发器类型:POSITIVE EDGE
宽度:7.62 mmBase Number Matches:1

SN74BCT2952NT 数据手册

 浏览型号SN74BCT2952NT的Datasheet PDF文件第2页浏览型号SN74BCT2952NT的Datasheet PDF文件第3页浏览型号SN74BCT2952NT的Datasheet PDF文件第4页浏览型号SN74BCT2952NT的Datasheet PDF文件第5页 
SN74BCT2952  
OCTAL BUS TRANSCEIVER AND REGISTER  
WITH 3-STATE OUTPUTS  
SCBS063A – FEBRUARY 1991 – REVISED NOVEMBER 1993  
DW OR NT PACKAGE  
(TOP VIEW)  
State-of-the-Art BiCMOS Design  
Significantly Reduces I  
CCZ  
ESD Protection Exceeds 2000 V  
B8  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
V
CC  
1
2
3
4
5
6
7
8
9
24  
23  
22  
21  
20  
19  
18  
17  
16  
Per MIL-STD-883C, Method 3015  
A8  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
Two 8-Bit, Back-to-Back Registers Store  
Data Flowing in Both Directions  
A Port Sinks 24 mA and Sources 3 mA  
B Port Sinks 64 mA and Sources 15 mA  
Noninverting Outputs  
Package Options Include Plastic  
Small-Outline (DW) Packages and Standard  
Plastic 300-mil DIPs (NT)  
OEAB  
CLKAB 10  
CLKENAB  
GND  
15 OEBA  
CLKBA  
CLKENBA  
11  
12  
14  
13  
description  
The SN74BCT2952 consists of two 8-bit back-to-back registers that store data flowing in both directions  
between two bidirectional buses. Data on the A or B bus is stored in the registers on the low-to-high transition  
of the clock (CLKAB or CLKBA) input provided that the clock-enable (CLKENAB or CLKENBA) input is low.  
Taking the output-enable (OEAB or OEBA) input low accesses the data on either port.  
The SN74BCT2952 is characterized for operation from 0°C to 70°C.  
§
logic symbol  
FUNCTION TABLE  
INPUTS  
OUTPUT  
B
15  
EN3  
G1  
CLKAB OEAB  
A
CLKENAB  
OEBA  
13  
CLKENBA  
14  
H
X
L
X
L
L
L
L
H
X
X
L
B
0
B
0
CLKBA  
1 C5  
H or L  
9
L
H
Z
EN4  
G2  
OEAB  
11  
L
H
X
CLKENAB  
10  
X
X
CLKAB  
2 C6  
A-to-B data flow is shown; B-to-A data flow is similar  
but uses CLKENBA, CLKBA, and OEBA.  
Level of B before the indicated steady-state input  
conditions were established.  
8
16  
3
1
1
5D  
B1  
A1  
6D  
4
17  
A2  
18  
7
6
5
4
3
2
1
B2  
B3  
B4  
B5  
B6  
B7  
B8  
A3  
19  
A4  
20  
A5  
21  
A6  
22  
A7  
23  
A8  
§
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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