Datasheet > 逻辑 > 总线驱动器/收发器> SN74AVCH24T245

SN74AVCH24T245

更新时间： 2024-11-23 09:15:07

品牌	Logo	应用领域
德州仪器 - TI		总线收发器输出元件
页数	文件大小	规格书
15页	347K
描述
24-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

数据手册
替代型号

如果您发现信息不准确，欢迎纠错

SN74AVCH24T245 数据手册

ꢀꢁꢂ ꢃ ꢄꢅꢆ ꢇꢈ ꢃꢉ ꢈꢃ ꢊ

ꢈ ꢃ ꢋꢌꢍ ꢉ ꢎꢏꢄ ꢐꢋꢀ ꢏꢑꢑꢐꢒ ꢌꢏꢀ ꢉ ꢓꢄꢁꢀ ꢆꢔ ꢍ ꢅꢔ ꢓ

ꢕ

ꢍ

ꢉ

ꢇ

ꢆ

ꢖ

ꢁ

ꢗ

ꢍ

ꢘ

ꢏ

ꢓ

ꢄ

ꢌ

ꢐ

ꢔ

ꢅ

ꢖ

ꢐ

ꢉ

ꢄ

ꢘ

ꢔ

ꢉ

ꢓ

ꢄ

ꢁ

ꢀ

ꢐ

ꢄ

ꢉ

ꢍ

ꢖ

ꢁ

ꢄ

ꢁ

ꢎ

ꢙ

ꢋ

ꢀ

ꢉ

ꢄ

ꢉ

ꢔ

ꢖ

ꢏ

ꢉ

ꢑ

ꢏ

ꢉ

ꢀ

SCES588B – AUGUST 2004 − REVISED MARCH 2005

Control Inputs V /V Levels Are

I/Os Are 4.6-V Tolerant

IH IL

Referenced to V

Voltage

CCA

Bus Hold on Data Inputs Eliminates the

Need for External Pullup/Pulldown

Resistors

Isolation Feature − If Either V

Input

Is at GND, All Outputs Are in the

High-Impedance State

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

Overvoltage-Tolerant Inputs/Outputs Allow

Mixed-Voltage-Mode Data Communications

ESD Protection Exceeds JESD 22

− 8000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

Fully Configurable Dual-Rail Design Allows

Each Port to Operate Over the Full 1.2-V to

3.6-V Power-Supply Range

− 1000-V Charged-Device Model (C101)

Supports Partial-Power-Down Mode

off

Operation

description/ordering information

This 24-bit noninverting bus transceiver uses two separate configurable power-supply rails. The

SN74AVCH24T245 is optimized to operate with V

as low as 1.2 V. The A port is designed to track V

set at 1.4 V to 3.6 V. It is operational with V

accepts any supply voltage from 1.2 V to 3.6 V. The

CCA CCB

. V

CCA CCA

B port is designed to track V

. V

accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal

CCB CCB

low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCH24T245 is designed for asynchronous communication between data buses. The device

transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the

direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are

effectively isolated.

The SN74AVCH24T245 is designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 5DIR, 6DIR, 1OE, 2OE,

3OE, 4OE, 5OE, and 6OE) are supplied by V

CCA

This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,

off

preventing damaging current backflow through the device when it is powered down.

The V

state.

isolation feature ensures that if either V

input is at GND, then both ports are in the high-impedance

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors

with the bus-hold circuitry is not recommended.

To ensure the high-impedance state during power up or power down, OE should be tied to V

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

through a pullup

CCA

ORDERING INFORMATION

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

†

PACKAGE

LFBGA − GRG

LFBGA − ZRG (Pb-free)

74AVCH24T245GRGR

74AVCH24T245ZRGR

−40°C to 85°C

Tape and reel

WL245

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

ꢑ

ꢓ

ꢖ

ꢩ

ꢎ

ꢤ

ꢏ

ꢆ

ꢢ

ꢉ

ꢣ

ꢍ

ꢝ

ꢖ

ꢛ

ꢁ

ꢜ

ꢎ

ꢄ

ꢉ

ꢄ

ꢚ

ꢛ

ꢥ

ꢜ

ꢝ

ꢣ

ꢞ

ꢟ

ꢠ

ꢡ

ꢚ

ꢝ

ꢛ

ꢚ

ꢢ

ꢦ

ꢣ

ꢤ

ꢞ

ꢥ

ꢛ

ꢡ

ꢠ

ꢟ

ꢢ

ꢝ

ꢜ

ꢦ

ꢉꢥ

ꢤ

ꢧ

ꢢ

ꢨ

ꢚ

ꢣ

ꢠ

ꢢ

ꢡ

ꢚ

ꢡ

ꢝ

ꢞ

ꢛ

ꢤ

ꢩ

ꢠ

ꢛ

ꢡ

ꢥ

ꢢ

ꢪ

ꢞ

ꢝ

ꢣ

ꢡ

ꢝ

ꢞ

ꢟ

ꢡ

ꢝ

ꢢ

ꢦ

ꢚ

ꢜ

ꢚ

ꢣ

ꢥ

ꢞ

ꢡ

ꢫ

ꢡ

ꢥ

ꢞ

ꢝ

ꢜ

ꢬ

ꢠ

ꢍ

ꢛ

ꢟ

ꢥ

ꢢ

ꢡ

ꢠ

ꢛ

ꢩ

ꢠ

ꢞ

ꢩ

ꢭ

ꢠ

ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ

ꢞ

ꢠ

ꢛ

ꢡ

ꢮ

ꢪ

ꢑ

ꢞ

ꢝ

ꢩ

ꢤ

ꢣ

ꢡ

ꢚ

ꢝ

ꢛ

ꢦ

ꢞ

ꢝ

ꢣ

ꢥ

ꢢ

ꢚ

ꢛ

ꢯ

ꢩ

ꢝ

ꢥ

ꢢ

ꢛ

ꢝ

ꢡ

ꢛ

ꢥ

ꢣ

ꢥ

ꢢ

ꢠ

ꢞ

ꢚ

ꢨ

ꢮ

ꢚ

ꢛ

ꢣ

ꢨ

ꢤ

ꢩ

ꢥ

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...15

中文翻译

下载PDF

SN74AVCH24T245 替代型号

型号	品牌	替代类型	描述	数据表
SN74AVC24T245	TI	功能相似	24-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPU

与SN74AVCH24T245相关器件

型号	品牌	获取价格	描述	数据表
SN74AVCH24T245_V01	TI	获取价格	24-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation And 3-State Outpu
SN74AVCH24T245GRG	TI	获取价格	24-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation And 3-State Outpu
SN74AVCH24T245GRG/ZRG	TI	获取价格	24-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation And 3-State Outpu
SN74AVCH24T245GRGR	TI	获取价格	24-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPU
SN74AVCH24T245NMU	TI	获取价格	24-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation And 3-State Outpu
SN74AVCH24T245NMUR	TI	获取价格	24-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation And 3-State Outpu
SN74AVCH24T245ZRG	TI	获取价格	24-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation And 3-State Outpu
SN74AVCH24T245ZRGR	TI	获取价格	24-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPU
SN74AVCH2T45	TI	获取价格	DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUT
SN74AVCH2T45_09	TI	获取价格	DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUT

与SN74AVCH24T245相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

36
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

28
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

56
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

53

产品中心

服务支持

精选活动

关于我们

帮助中心

SN74AVCH24T245

SN74AVCH24T245 数据手册

SN74AVCH24T245 替代型号

与SN74AVCH24T245相关器件

与SN74AVCH24T245相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SN74AVCH24T245

SN74AVCH24T245 数据手册

SN74AVCH24T245 替代型号

与SN74AVCH24T245相关器件

与SN74AVCH24T245相关文章

您还可以找

您在本页遇到什么问题？