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SN74AVCBH164245ZQLR PDF预览

SN74AVCBH164245ZQLR

更新时间： 2024-09-16 13:13:47
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
13页 292K
描述
AVC SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PBGA56, GREEN, PLASTIC, VFBGA-56

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SN74AVCBH164245ZQLR 技术参数

生命周期：Obsolete零件包装代码：BGA
包装说明：VFBGA,针数：56
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.49Is Samacsys：N
系列：AVCJESD-30 代码：R-PBGA-B56
JESD-609代码：e1长度：7 mm
逻辑集成电路类型：BUS TRANSCEIVER位数：8
功能数量：2端口数量：2
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：VFBGA封装形状：RECTANGULAR
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH传播延迟（tpd）：7.6 ns
认证状态：Not Qualified座面最大高度：1 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.4 V
标称供电电压 (Vsup)：1.5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：TIN SILVER COPPER端子形式：BALL
端子节距：0.65 mm端子位置：BOTTOM
宽度：4.5 mmBase Number Matches：1

SN74AVCBH164245ZQLR 数据手册

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SCES393A − JUNE 2002 − REVISED MAY 2004  
D
D
Member of the Texas Instruments  
WidebusFamily  
DOCCircuitry Dynamically Changes  
Output Impedance, Resulting in Noise  
D
D
I
Supports Partial-Power-Down Mode  
off  
Operation  
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over the Full 1.4-V to  
3.6-V Power-Supply Range  
Reduction Without Speed Degradation  
Dynamic Drive Capability Is Equivalent to  
Standard Outputs With I and I of  
D
D
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
OH  
OL  
24 mA at 2.5-V V  
CC  
D
D
D
Control Inputs V /V Levels are  
D
D
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
IH IL  
Referenced to V  
Voltage  
CCB  
If Either V  
Are in the High-Impedance State  
Input Is at GND, Both Ports  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
CC  
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
− 1000-V Charged-Device Model (C101)  
description/ordering information  
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The  
A-port is designed to track V . V accepts any supply voltage from 1.4 V to 3.6 V. The B-port is designed  
CCA CCA  
to track V  
. V  
accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage  
CCB CCB  
bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.  
The SN74AVCBH164245 is designed for asynchronous communication between data buses. The device  
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the  
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are  
effectively isolated.  
The SN74AVCBH164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by  
V
.
CCB  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup  
or pulldown resistors with the bus-hold circuitry is not recommended.  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CCB  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down. If either V  
both ports are in the high-impedance state.  
input is at GND,  
CC  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
TSSOP − DGG Tape and reel SN74AVCBH164245GR  
AVCBH164245  
WBH4245  
TVSOP − DGV  
VFBGA − GQL  
Tape and reel SN74AVCBH164245VR  
Tape and reel SN74AVCBH164245KR  
−40°C to 85°C  
WBH4245  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
DOC and Widebus are trademarks of Texas Instruments.  
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Copyright 2004, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...13

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