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SN74AVCB324245 PDF预览

SN74AVCB324245

更新时间: 2024-02-03 00:39:26
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
13页 329K
描述
32 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS

SN74AVCB324245 技术参数

生命周期:Lifetime Buy零件包装代码:BGA
包装说明:LFBGA, BGA96,6X16,32针数:96
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:7.45Is Samacsys:N
控制类型:COMMON CONTROL计数方向:BIDIRECTIONAL
系列:AVCJESD-30 代码:R-PBGA-B96
JESD-609代码:e0长度:13.5 mm
负载电容(CL):30 pF逻辑集成电路类型:BUS TRANSCEIVER
最大I(ol):0.012 A湿度敏感等级:2
位数:8功能数量:4
端口数量:2端子数量:96
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装等效代码:BGA96,6X16,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH包装方法:TR
峰值回流温度(摄氏度):235电源:3.3 V
最大电源电流(ICC):0.16 mAProp。Delay @ Nom-Sup:3.1 ns
传播延迟(tpd):6.8 ns认证状态:Not Qualified
座面最大高度:1.4 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.4 V
标称供电电压 (Vsup):1.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:5.5 mmBase Number Matches:1

SN74AVCB324245 数据手册

 浏览型号SN74AVCB324245的Datasheet PDF文件第2页浏览型号SN74AVCB324245的Datasheet PDF文件第3页浏览型号SN74AVCB324245的Datasheet PDF文件第4页浏览型号SN74AVCB324245的Datasheet PDF文件第5页浏览型号SN74AVCB324245的Datasheet PDF文件第6页浏览型号SN74AVCB324245的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢅꢆ ꢇꢈ ꢉꢃ ꢉꢃ ꢊ  
ꢈ ꢉ ꢋꢇꢌ ꢍ ꢎꢏꢄ ꢐꢋꢀ ꢏꢑꢑꢐꢒ ꢇꢏꢀ ꢍ ꢓꢄꢁꢀ ꢆꢔ ꢌ ꢅꢔ ꢓ  
SCES485A − AUGUST 2003 − REVISED JUNE 2004  
D
D
Member of the Texas Instruments  
Widebus+Family  
DOCCircuitry Dynamically Changes  
Output Impedance, Resulting in Noise  
D
Inputs/Outputs Can Tolerate Up to 4.6 V,  
Which Allows Mixed-Voltage-Mode Data  
Communications  
D
D
I
Supports Partial-Power-Down Mode  
off  
Reduction Without Speed Degradation  
Dynamic Drive Capability Is Equivalent to  
Standard Outputs With I and I of  
Operation  
D
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over the Full 1.4-V to  
3.6-V Power-Supply Range  
OH  
OL  
24 mA at 3-V V  
15 mA at 2.3-V V  
9 mA at 1.65-V V  
CC  
CC  
CC  
D
D
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
6 mA at 1.4-V V  
CC  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
D
D
Control Inputs V /V Levels are  
IH IL  
CCB  
Referenced to V  
Voltage  
If Either V  
Are in the High-Impedance State  
Input Is at GND, Both Ports  
− 1000-V Charged-Device Model (C101)  
CC  
description/ordering information  
This 32-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is  
designed to track V . V accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to track  
CCA CCA  
V
. V  
accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional  
CCB CCB  
translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.  
The SN74AVCB324245 is designed for asynchronous communication between data buses. The device  
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the  
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are  
effectively isolated.  
The SN74AVCB324245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by V  
.
CCB  
To ensure the high-impedance state during power up or power down, OE shall be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CCB  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down. If either V  
both ports are in the high-impedance state.  
input is at GND,  
CC  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
LFBGA − GKE  
LFBGA − ZKE (Pb-free)  
SN74AVCB324245KR  
74AVCB324245ZKER  
−40°C to 85°C  
Tape and reel  
WD4245  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
DOC and Widebus+ are trademarks of Texas Instruments.  
ꢍꢥ  
Copyright 2004, Texas Instruments Incorporated  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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