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SN74AVC32373GKE

更新时间： 2024-09-15 22:14:11
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器锁存器逻辑集成电路输出元件
页数 文件大小 规格书
10页 167K
描述
1.2-V/3.3-V 32-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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SN74AVC32373GKE 技术参数

生命周期：Obsolete零件包装代码：BGA
包装说明：LFBGA,针数：96
Reach Compliance Code：unknown风险等级：5.84
Is Samacsys：N系列：AVC
JESD-30 代码：R-PBGA-B96长度：13.5 mm
逻辑集成电路类型：BUS DRIVER位数：8
功能数量：4端口数量：2
端子数量：96最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：LFBGA封装形状：RECTANGULAR
封装形式：GRID ARRAY, LOW PROFILE, FINE PITCH传播延迟（tpd）：8.3 ns
认证状态：Not Qualified座面最大高度：1.5 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.2 V
标称供电电压 (Vsup)：1.5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：BALL端子节距：0.8 mm
端子位置：BOTTOM宽度：5.5 mm
Base Number Matches：1

SN74AVC32373GKE 数据手册

 浏览型号SN74AVC32373GKE的Datasheet PDF文件第2页浏览型号SN74AVC32373GKE的Datasheet PDF文件第3页浏览型号SN74AVC32373GKE的Datasheet PDF文件第4页浏览型号SN74AVC32373GKE的Datasheet PDF文件第5页浏览型号SN74AVC32373GKE的Datasheet PDF文件第6页浏览型号SN74AVC32373GKE的Datasheet PDF文件第7页 
SN74AVC32373  
1.2-V/3.3-V 32-BIT TRANSPARENT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SCES327 – APRIL 2000  
Member of the Texas Instruments  
Widebus Family  
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
I
Supports Partial-Power-Down Mode  
off  
Operation  
DOC (Dynamic Output Control) Circuit  
Dynamically Changes Output Impedance,  
Resulting in Noise Reduction Without  
Speed Degradation  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
Dynamic Drive Capability Is Equivalent to  
Standard Outputs With I  
and I  
of  
OH  
OL  
Packaged in Plastic Fine-Pitch Ball Grid  
Array Package  
±24 mA at 2.5-V V  
CC  
description  
A Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output  
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1  
shows typical V vs I and V  
vs I  
curves to illustrate the output impedance and drive capability of the  
OL  
OL  
OH  
OH  
circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is  
equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC  
Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC )  
Circuitry Technology and Applications, literature number SCEA009.  
3.2  
T
= 25°C  
T
= 25°C  
A
A
Process = Nominal  
Process = Nominal  
2.8  
2.4  
2.0  
2.8  
2.4  
2.0  
V
= 3.3 V  
CC  
1.6  
1.2  
0.8  
0.4  
1.6  
1.2  
0.8  
0.4  
V
= 2.5 V  
CC  
V
= 1.8 V  
CC  
V
= 3.3 V  
V
= 2.5 V  
CC  
CC  
V
= 1.8 V  
CC  
–160 –144 –128 –112 –96 –80 –64 –48 –32 –16  
– Output Current – mA  
0
17  
34  
51  
68  
85 102 119 136 153 170  
0
I
– Output Current – mA  
I
OH  
OL  
Figure 1. Output Voltage vs Output Current  
This 32-bit transparent D-type latch with is operational from 1.2-V or 3.6-V V , but is designed specifically for  
CC  
1.65-V to 3.6-V V  
operation.  
CC  
The SN74AVC32373 can be used as four 8-bit latches, two 16-bit latches, or one 32-bit latch. When the  
latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs  
are latched at the levels set up at the D inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive  
thebuslinessignificantly. Thehigh-impedancestateandincreaseddriveprovidethecapabilitytodrivebuslines  
without interface or pullup components.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
DOC, EPIC, and Widebus are trademarks of Texas Instruments.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...10

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