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SN74AVC1T45_10

更新时间: 2024-09-15 11:53:07
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德州仪器 - TI 总线收发器输出元件
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描述
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

SN74AVC1T45_10 数据手册

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SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530GDECEMBER 2003REVISED JANUARY 2008  
1
FEATURES  
2
Available in the Texas Instruments NanoFree™  
Package  
Typical Max Data Rates  
500 Mbps (1.8-V to 3.3-V Translation)  
320 Mbps (<1.8-V to 3.3-V Translation)  
320 Mbps (Translate to 2.5 V or 1.8 V)  
280 Mbps (Translate to 1.5 V)  
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over the Full 1.2-V to  
3.6-V Power-Supply Range  
VCC Isolation Feature - If Either VCC Input Is at  
GND, Both Ports Are in the High-Impedance  
State  
240 Mbps (Translate to 1.2 V)  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
DIR Input Circuit Referenced to VCCA  
±12-mA Output Drive at 3.3 V  
I/Os Are 4.6-V Tolerant  
ESD Protection Exceeds JESD 22  
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
Ioff Supports Partial-Power-Down Mode  
Operation  
1000-V Charged-Device Model (C101)  
DBV PACKAGE  
(TOP VIEW)  
YZP PACKAGE  
(BOTTOM VIEW)  
DCK PACKAGE  
(TOP VIEW)  
DRL PACKAGE  
(TOP VIEW)  
C2  
C1  
3 4  
2 5  
1 6  
A
GND  
VCCA  
B
DIR  
VCCB  
1
2
3
6
5
4
VCCA  
GND  
A
VCCB VCCA  
VCCB  
DIR  
B
1
2
3
6
5
4
1
2
3
6
VCCA  
GND  
A
VCCB  
DIR  
B
B1  
A1  
B2  
A2  
GND  
DIR  
A
5
4
B
See mechanical drawings for dimensions.  
DESCRIPTION/ORDERING INFORMATION  
This single-bit noninverting bus transceiver uses two separate configurable power-supply rails. The  
SN74AVC1T45 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as  
low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The  
B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal  
low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.  
ORDERING INFORMATION  
TA  
PACKAGE(1)(2)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING(3)  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
SOT (SOT-23) – DBV  
Reel of 3000  
SN74AVC1T45YZPR  
_ _ _TC_  
Reel of 3000  
Reel of 3000  
Reel of 4000  
SN74AVC1T45DBVR  
SN74AVC1T45DCKR  
SN74AVC1T45DRLR  
DT1_  
TC_  
TC_  
–40°C to 85°C  
SOT (SC-70) – DCK  
SOT (SOT-553) – DRL  
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
(3) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.  
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following  
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
NanoFree is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2003–2008, Texas Instruments Incorporated  

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