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SN74AUP2G34DRYR

更新时间： 2024-09-28 11:58:23
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管PC
页数 文件大小 规格书
19页 907K
描述
LOW-POWER DUAL BUFFER GATE

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SN74AUP2G34DRYR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SON
包装说明：SON-6针数：6
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：6 weeks
风险等级：1.68Samacsys Confidence：
Samacsys Status：ReleasedSamacsys PartID：606953
Samacsys Pin Count：6Samacsys Part Category：Integrated Circuit
Samacsys Package Category：OtherSamacsys Footprint Name：SON50P100X145X60-6N
Samacsys Released Date：2017-01-12 12:59:53Is Samacsys：N
系列：AUP/ULP/VJESD-30 代码：R-PDSO-N6
JESD-609代码：e4长度：1.45 mm
负载电容（CL）：30 pF逻辑集成电路类型：INVERTER
最大I（ol）：0.004 A湿度敏感等级：1
功能数量：2输入次数：1
端子数量：6最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：VSON
封装等效代码：SOLCC6,.04,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE包装方法：TR
峰值回流温度（摄氏度）：260电源：1.2/3.3 V
最大电源电流（ICC）：0.0009 mAProp。Delay @ Nom-Sup：25.5 ns
传播延迟（tpd）：25.5 ns认证状态：Not Qualified
施密特触发器：NO座面最大高度：0.6 mm
子类别：Gates最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：0.8 V标称供电电压 (Vsup)：1.2 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：1 mmBase Number Matches：1

SN74AUP2G34DRYR 数据手册

 浏览型号SN74AUP2G34DRYR的Datasheet PDF文件第2页浏览型号SN74AUP2G34DRYR的Datasheet PDF文件第3页浏览型号SN74AUP2G34DRYR的Datasheet PDF文件第4页浏览型号SN74AUP2G34DRYR的Datasheet PDF文件第5页浏览型号SN74AUP2G34DRYR的Datasheet PDF文件第6页浏览型号SN74AUP2G34DRYR的Datasheet PDF文件第7页 
SN74AUP2G34  
www.ti.com  
SCES751B –SEPTEMBER 2009–REVISED MARCH 2010  
LOW-POWER DUAL BUFFER GATE  
Check for Samples: SN74AUP2G34  
1
FEATURES  
•
•
•
Available in the Texas Instruments NanoStar™  
Package  
•
•
Optimized for 3.3-V Operation  
3.6-V I/O Tolerant to Support Mixed-Mode  
Signal Operation  
Low Static-Power Consumption:  
ICC = 0.9 mA Max  
•
•
•
tpd = 4.3 ns Max at 3.3 V  
Low Dynamic-Power Consumption:  
Cpd = 4.3 pF Typ at 3.3 V  
Suitable for Point-to-Point Applications  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
•
•
Low Input Capacitance: Ci = 1.5 pF Typ  
Low Noise: Overshoot and Undershoot  
<10% of VCC  
•
ESD Performance Tested Per JESD 22  
–
2000-V Human-Body Model  
(A114-B, Class II)  
•
•
Ioff Supports Partial-Power-Down Mode  
Operation  
–
1000-V Charged-Device Model (C101)  
Wide Operating VCC Range of 0.8 V to 3.6 V  
DCK PACKAGE  
(TOP VIEW)  
DSF PACKAGE  
(TOP VIEW)  
YFP PACKAGE  
(TOP VIEW)  
DRY PACKAGE  
(TOP VIEW)  
A2  
A1  
B1  
1
2
6
5
4
1A  
GND  
2A  
1Y  
VCC  
2Y  
1
2
3
6
5
4
6
6
5
4
1
1A  
GND  
2A  
1
2
3
1A  
1Y  
1Y  
VCC  
2Y  
1A  
1Y  
B2  
C2  
5
4
2
3
VCC  
2Y  
GND  
2A  
C1 3  
VCC  
GND  
2A  
2Y  
See mechanical drawings for dimensions.  
DESCRIPTION/ORDERING INFORMATION  
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable  
applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range  
of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal  
integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).  
Switching Characteristics  
Static-Power Consumption  
Dynamic-Power Consumption  
at 25 MHz(A)  
(µA)  
(pF)  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
-0.5  
100%  
80%  
60%  
40%  
20%  
0%  
100%  
80%  
60%  
40%  
20%  
0%  
Input  
Output  
3.3-V  
Logic(A)  
3.3-V  
Logic(A)  
AUP  
AUP  
20  
25  
Time (ns)  
10 15  
0
5
35 40 45  
30  
(A)  
Single, dual, and triple gates  
(A) SN74AUP2Gxx data at C = 15 pF.  
L
Figure 1. AUP – The Lowest-Power Family  
Figure 2. Excellent Signal Integrity  
The SN74AUP2G34 performs the Boolean function Y = A in positive logic.  
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the  
package.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2009–2010, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
 
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SN74AUP2G34DRYR 替代型号

型号 品牌 替代类型 描述 数据表
SN74AUP2G34YFPR TI

完全替代

 LOW-POWER DUAL BUFFER GATE
SN74AUP2G34DSFR TI

完全替代

 LOW-POWER DUAL BUFFER GATE
SN74AUP2G34DCKR TI

完全替代

 LOW-POWER DUAL BUFFER GATE

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