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SN74AUP2G32

更新时间： 2024-09-28 11:58:23

品牌	Logo	应用领域
德州仪器 - TI		输入元件
页数	文件大小	规格书
20页	739K
描述
LOW-POWER DUAL 2-INPUT POSITIVE-OR GATE

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SN74AUP2G32 数据手册

SN74AUP2G32

www.ti.com

SCES754B –SEPTEMBER 2009–REVISED MAY 2010

LOW-POWER DUAL 2-INPUT POSITIVE-OR GATE

Check for Samples: SN74AUP2G32

FEATURES

•

Available in the Texas Instruments NanoStar™

Package

•

Optimized for 3.3-V Operation

3.6-V I/O Tolerant to Support Mixed-Mode

Signal Operation

Low Static-Power Consumption

(I_CC= 0.9 mA Maximum)

•

t_pd= 4.3 ns Maximum at 3.3 V

Low Dynamic-Power Consumption

(C_pd= 4.3 pF Typ at 3.3 V)

Suitable for Point-to-Point Applications

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

•

Low Input Capacitance (C_i= 1.5 pF Typical)

Low Noise – Overshoot and Undershoot

<10% of V_CC

•

ESD Performance Tested Per JESD 22

–

2000-V Human-Body Model

(A114-B, Class II)

•

I_offSupports Partial-Power-Down Mode

Operation

–

1000-V Charged-Device Model (C101)

Wide Operating V_CCRange of 0.8 V to 3.6 V

DCU PACKAGE

(TOP VIEW)

DQE PACKAGE

(TOP VIEW)

RSE PACKAGE

(TOP VIEW)

YFP PACKAGE

(TOP VIEW)

V_CC

1 8

2 7

3 6

4 5

V_CC

GND

See mechanical drawings for dimensions.

DESCRIPTION/ORDERING INFORMATION

The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable

applications. This family ensures a very low static- and dynamic-power consumption across the entire V_CCrange

of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal

integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).

Static-Power Consumption

(µA)

Dynamic-Power Consumption

(pF)

Switching Characteristics

at 25 MHz^(A)

100%

80%

60%

40%

20%

100%

80%

60%

40%

20%

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

-0.5

Input

Output

3.3-V

Logic^(A)

3.3-V

Logic^(A)

AUP

(A)

Time (ns)

10 15

35 40 45

Single, dual, and triple gates

^(A)SN74AUP2Gxx data at C = 15 pF.

Figure 1. AUP – The Lowest-Power Family

Figure 2. Excellent Signal Integrity

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...20

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SN74AUP2G32 替代型号

型号	品牌	替代类型	描述	数据表
SN74AUC2G32	TI	功能相似	DUAL 2 INPUT POSITIVE OR GATE

与SN74AUP2G32相关器件

型号	品牌	获取价格	描述	数据表
SN74AUP2G32DCUR	TI	获取价格	LOW-POWER DUAL 2-INPUT POSITIVE-OR GATE
SN74AUP2G32DQER	TI	获取价格	LOW-POWER DUAL 2-INPUT POSITIVE-OR GATE
SN74AUP2G32RSER	TI	获取价格	LOW-POWER DUAL 2-INPUT POSITIVE-OR GATE
SN74AUP2G32YFPR	TI	获取价格	LOW-POWER DUAL 2-INPUT POSITIVE-OR GATE
SN74AUP2G34	TI	获取价格	LOW-POWER DUAL BUFFER GATE
SN74AUP2G34DCKR	TI	获取价格	LOW-POWER DUAL BUFFER GATE
SN74AUP2G34DRYR	TI	获取价格	LOW-POWER DUAL BUFFER GATE
SN74AUP2G34DSFR	TI	获取价格	LOW-POWER DUAL BUFFER GATE
SN74AUP2G34YFPR	TI	获取价格	LOW-POWER DUAL BUFFER GATE
SN74AUP2G79	TI	获取价格	LOW-POWER DUAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP

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