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SN74AUP2G14DSFR

更新时间： 2024-11-16 11:58:23
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德州仪器 - TI 触发器
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23页 918K
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LOW-POWER DUAL SCHMITT-TRIGGER INVERTER

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SN74AUP2G14DSFR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SON
包装说明：VSON, SOLCC6,.04,14针数：6
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.66系列：AUP/ULP/V
JESD-30 代码：S-PDSO-N6JESD-609代码：e4
长度：1 mm负载电容（CL）：30 pF
逻辑集成电路类型：INVERTER最大I（ol）：0.004 A
湿度敏感等级：1功能数量：2
输入次数：1端子数量：6
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：VSON
封装等效代码：SOLCC6,.04,14封装形状：SQUARE
封装形式：SMALL OUTLINE, VERY THIN PROFILE包装方法：TR
峰值回流温度（摄氏度）：260电源：1.2/3.3 V
最大电源电流（ICC）：0.0009 mAProp。Delay @ Nom-Sup：25.5 ns
传播延迟（tpd）：25.5 ns认证状态：Not Qualified
施密特触发器：YES座面最大高度：0.4 mm
子类别：Gates最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：0.8 V标称供电电压 (Vsup)：1.1 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：NO LEAD端子节距：0.35 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：1 mmBase Number Matches：1

SN74AUP2G14DSFR 数据手册

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SN74AUP2G14  
www.ti.com  
SCES749C –SEPTEMBER 2009–REVISED FEBRUARY 2012  
LOW-POWER DUAL SCHMITT-TRIGGER INVERTER  
Check for Samples: SN74AUP2G14  
1
FEATURES  
2
•
•
•
Available in the Texas Instruments NanoStar™  
Package  
•
•
Optimized for 3.3-V Operation  
3.6-V I/O Tolerant to Support Mixed-Mode  
Signal Operation  
Low Static-Power Consumption  
(ICC = 0.9 μA Maximum)  
•
•
•
tpd = 4.3 ns Maximum at 3.3 V  
Low Dynamic-Power Consumption  
(Cpd = 4.3 pF Typical at 3.3 V)  
Suitable for Point-to-Point Applications  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
•
•
Low Input Capacitance (Ci = 1.5 pF Typical)  
Low Noise – Overshoot and Undershoot  
<10% of VCC  
•
ESD Performance Tested Per JESD 22  
–
2000-V Human-Body Model  
(A114-B, Class II)  
•
•
Ioff Supports Partial-Power-Down Mode  
Operation  
–
1000-V Charged-Device Model (C101)  
Wide Operating VCC Range of 0.8 V to 3.6 V  
DCK PACKAGE  
(TOP VIEW)  
DSF PACKAGE  
(TOP VIEW)  
YFP PACKAGE  
(TOP VIEW)  
DRY PACKAGE  
(TOP VIEW)  
A2  
A1  
B1  
1
2
6
5
4
1A  
GND  
2A  
1Y  
VCC  
2Y  
1
2
3
6
5
4
6
6
5
4
1
1A  
GND  
2A  
1
2
3
1A  
1Y  
1Y  
VCC  
2Y  
1A  
1Y  
B2  
C2  
5
4
2
3
VCC  
2Y  
GND  
2A  
C1 3  
VCC  
GND  
2A  
2Y  
See mechanical drawings for dimensions.  
DESCRIPTION/ORDERING INFORMATION  
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable  
applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range  
of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal  
integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).  
Static-Power Consumption  
Dynamic-Power Consumption  
Switching Characteristics  
at 25 MHz(A)  
(µA)  
(pF)  
100%  
80%  
60%  
40%  
20%  
0%  
100%  
3.5  
3.0  
80%  
60%  
40%  
20%  
0%  
2.5  
Input  
Output  
2.0  
3.3-V  
Logic(A)  
3.3-V  
Logic(A)  
1.5  
1.0  
0.5  
AUP  
AUP  
0.0  
−0.5  
(A)  
20  
25  
Time (ns)  
10 15  
0
5
35 40 45  
30  
Single, dual, and triple gates  
(A) SN74AUP2Gxx data at C = 15 pF.  
L
Figure 1. AUP – The Lowest-Power Family  
Figure 2. Excellent Signal Integrity  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
NanoStar is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009–2012, Texas Instruments Incorporated  
 
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SN74AUP2G14DSFR 替代型号

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