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SN74AUP2G125

更新时间： 2024-11-16 11:50:39

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
21页	869K
描述
LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OTPUTS

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替代型号

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SN74AUP2G125 数据手册

SN74AUP2G125

www.ti.com

SCES688D –JANUARY 2007–REVISED MAY 2010

LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS

Check for Samples: SN74AUP2G125

FEATURES

•

Available in the Texas Instruments NanoStar™

Package

•

Wide Operating V_CCRange of 0.8 V to 3.6 V

Optimized for 3.3-V Operation

Low Static-Power Consumption

(I_CC= 0.9 mA Max)

3.6-V I/O Tolerant to Support Mixed-Mode

Signal Operation

Low Dynamic-Power Consumption

(C_pd= 4 pF Typ at 3.3 V)

•

t_pd= 5.4 ns Max at 3.3 V

Suitable for Point-to-Point Applications

•

Low Input Capacitance (C_I= 1.5 pF Typ)

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

Low Noise – Overshoot and Undershoot

<10% of V_CC

•

ESD Performance Tested Per JESD 22

•

Input-Disable Feature Allows Floating Input

Conditions

–

2000-V Human-Body Model

(A114-B, Class II)

I_offSupports Partial-Power-Down Mode

Operation

–

1000-V Charged-Device Model (C101)

Input Hysteresis Allows Slow Input Transition

and Better Switching Noise Immunity at Input

DCU PACKAGE

(TOP VIEW)

DQE PACKAGE

(TOP VIEW)

RSE PACKAGE

(TOP VIEW)

YFP ORYZP PACKAGE

(TOP VIEW)

V_CC

1OE

V_CC

2OE

A2 V_CC

1 8

2 7

3 6

4 5

V_CC

2OE

1OE

2OE

1OE

GND

The exposed center pad, if used, must be connected

only as a secondary GND or left electrically open.

See mechanical drawings for dimensions.

DESCRIPTION/ORDERING INFORMATION

The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable

applications. This family ensures a very low static and dynamic power consumption across the entire V_CCrange

of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see

Figure 1 and Figure 2).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...21

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SN74AUP2G125 替代型号

型号	品牌	替代类型	描述	数据表
SN74AUC2G125	TI	功能相似	DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS

与SN74AUP2G125相关器件

型号	品牌	获取价格	描述	数据表
SN74AUP2G125DCUR	TI	获取价格	LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OTPUTS
SN74AUP2G125DQER	TI	获取价格	LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OTPUTS
SN74AUP2G125RSER	TI	获取价格	LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OTPUTS
SN74AUP2G125YFPR	TI	获取价格	LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OTPUTS
SN74AUP2G125YZPR	TI	获取价格	LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OTPUTS
SN74AUP2G126	TI	获取价格	LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS
SN74AUP2G126DCUR	TI	获取价格	具有三态输出的 2 通道、0.8V 至 3.6V 低功耗缓冲器 \| DCU \| 8 \| -
SN74AUP2G126DQER	TI	获取价格	Low-Power Dual Bus Buffer Gate With 3-State Outputs 8-X2SON -40 to 85
SN74AUP2G126RSER	TI	获取价格	Low-Power Dual Bus Buffer Gate With 3-State Outputs 8-UQFN -40 to 85
SN74AUP2G126YFPR	TI	获取价格	LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS

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