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SN74AUP1G06DRYR PDF预览

SN74AUP1G06DRYR

更新时间: 2024-11-02 09:15:19
品牌 Logo 应用领域
德州仪器 - TI 驱动器栅极触发器逻辑集成电路光电二极管输出元件PC
页数 文件大小 规格书
21页 927K
描述
LOW-POWER SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS

SN74AUP1G06DRYR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SON
包装说明:SON-6针数:6
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:1.61Samacsys Confidence:
Samacsys Status:ReleasedSamacsys PartID:546059
Samacsys Pin Count:6Samacsys Part Category:Integrated Circuit
Samacsys Package Category:OtherSamacsys Footprint Name:SON50P100X145X60-6N
Samacsys Released Date:2017-01-12 12:59:53Is Samacsys:N
系列:AUP/ULP/VJESD-30 代码:R-PDSO-N6
JESD-609代码:e4长度:1.45 mm
负载电容(CL):30 pF逻辑集成电路类型:INVERTER
最大I(ol):0.004 A湿度敏感等级:1
功能数量:1输入次数:1
端子数量:6最高工作温度:85 °C
最低工作温度:-40 °C输出特性:OPEN-DRAIN
封装主体材料:PLASTIC/EPOXY封装代码:VSON
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE
包装方法:TR峰值回流温度(摄氏度):260
最大电源电流(ICC):0.0009 mAProp。Delay @ Nom-Sup:19.3 ns
传播延迟(tpd):19.3 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:0.6 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):0.8 V
标称供电电压 (Vsup):1.1 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:1 mm
Base Number Matches:1

SN74AUP1G06DRYR 数据手册

 浏览型号SN74AUP1G06DRYR的Datasheet PDF文件第2页浏览型号SN74AUP1G06DRYR的Datasheet PDF文件第3页浏览型号SN74AUP1G06DRYR的Datasheet PDF文件第4页浏览型号SN74AUP1G06DRYR的Datasheet PDF文件第5页浏览型号SN74AUP1G06DRYR的Datasheet PDF文件第6页浏览型号SN74AUP1G06DRYR的Datasheet PDF文件第7页 
SN74AUP1G06  
www.ti.com  
SCES590D JULY 2004REVISED MAY 2010  
LOW-POWER SINGLE INVERTER BUFFER/DRIVER  
WITH OPEN-DRAIN OUTPUTS  
Check for Samples: SN74AUP1G06  
1
FEATURES  
Available in the Texas Instruments NanoStar™  
Package  
Input (Vhys = 250 mV Typ at 3.3 V)  
Wide Operating VCC Range of 0.8 V to 3.6 V  
Optimized for 3.3-V Operation  
Low Static-Power Consumption  
(ICC = 0.9 mA Max)  
3.6-V I/O Tolerant to Support Mixed-Mode  
Signal Operation  
Low Dynamic-Power Consumption  
(Cpd = 1 pF Typ at 3.3 V)  
tpd = 3.6 ns Max at 3.3 V  
Low Input Capacitance (Ci = 1.5 pF Typ)  
Suitable for Point-to-Point Applications  
Low Noise – Overshoot and Undershoot <10%  
of VCC  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
Ioff Supports Partial Power-Down-Mode  
Operation  
ESD Performance Tested Per JESD 22  
2000-V Human-Body Model  
(A114-B, Class II)  
Input Hysteresis Allows Slow Input Transition  
and Better Switching Noise Immunity at the  
1000-V Charged-Device Model (C101)  
DBV PACKAGE  
(TOP VIEW)  
DCK PACKAGE  
(TOP VIEW)  
VCC  
1
2
3
5
4
N.C.  
A
VCC  
1
2
3
5
N.C.  
A
GND  
Y
4
GND  
Y
DRY PACKAGE  
(TOP VIEW)  
DSF PACKAGE  
(TOP VIEW)  
YFP PACKAGE  
(TOP VIEW)  
1
2
3
6
5
4
1
2
3
6
5
4
A2  
A1  
B1  
1
2
4
3
VCC  
Y
N.C.  
A
VCC  
N.C.  
Y
N.C.  
A
V
A
CC  
B2  
GND  
N.C.  
Y
GND  
GND  
See mechanical drawings for dimensions.  
N.C. – No internal connection  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2004–2010, Texas Instruments Incorporated  

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