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SN74AUCH32374ZKER

更新时间： 2024-11-15 22:07:07
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路输出元件
页数 文件大小 规格书
11页 285K
描述
32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

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SN74AUCH32374ZKER 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Lifetime Buy零件包装代码：BGA
包装说明：LFBGA, BGA96,6X16,32针数：96
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：5.62
控制类型：INDEPENDENT CONTROL计数方向：UNIDIRECTIONAL
系列：AUCJESD-30 代码：R-PBGA-B96
JESD-609代码：e1长度：13.5 mm
负载电容（CL）：15 pF逻辑集成电路类型：BUS DRIVER
最大频率@ Nom-Sup：250000000 Hz最大I（ol）：0.009 A
湿度敏感等级：3位数：8
功能数量：4端口数量：2
端子数量：96最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：LFBGA封装等效代码：BGA96,6X16,32
封装形状：RECTANGULAR封装形式：GRID ARRAY, LOW PROFILE, FINE PITCH
包装方法：TR峰值回流温度（摄氏度）：260
电源：1.2/2.5 V最大电源电流（ICC）：0.04 mA
Prop。Delay @ Nom-Sup：4.5 ns传播延迟（tpd）：4.5 ns
认证状态：Not Qualified座面最大高度：1.4 mm
子类别：FF/Latches最大供电电压 (Vsup)：2.7 V
最小供电电压 (Vsup)：0.8 V标称供电电压 (Vsup)：1.2 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Silver/Copper (Sn/Ag/Cu)
端子形式：BALL端子节距：0.8 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A触发器类型：POSITIVE EDGE
宽度：5.5 mmBase Number Matches：1

SN74AUCH32374ZKER 数据手册

 浏览型号SN74AUCH32374ZKER的Datasheet PDF文件第2页浏览型号SN74AUCH32374ZKER的Datasheet PDF文件第3页浏览型号SN74AUCH32374ZKER的Datasheet PDF文件第4页浏览型号SN74AUCH32374ZKER的Datasheet PDF文件第5页浏览型号SN74AUCH32374ZKER的Datasheet PDF文件第6页浏览型号SN74AUCH32374ZKER的Datasheet PDF文件第7页 
SN74AUCH32374  
32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP  
WITH 3-STATE OUTPUTS  
SCES476 – AUGUST 2003  
Member of the Texas Instruments  
8-mA Output Drive at 1.8 V  
Widebus+Family  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
Optimized for 1.8-V Operation and is 3.6-V  
I/O Tolerant to Support Mixed-Mode Signal  
Operation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
I
Supports Partial-Power-Down Mode  
off  
Operation  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
Sub 1-V Operable  
Max t of 2.8 ns at 1.8 V  
pd  
Low Power Consumption, 40-µA Max I  
– 1000-V Charged-Device Model (C101)  
CC  
description/ordering information  
This 32-bit edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V V , but is designed specifically for  
CC  
1.65-V to 1.95-V V  
operation.  
CC  
The SN74AUCH32374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus  
drivers, and working registers. It can be used as four 8-bit flip-flops, two 16-bit flip-flops, or one 32-bit flip-flop.  
On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up  
at the data (D) inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive  
thebuslinessignificantly. Thehigh-impedancestateandincreaseddriveprovidethecapabilitytodrivebuslines  
without interface or pullup components.  
OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while  
the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Activebus-holdcircuitryholdsunusedorundriveninputsatavalidlogicstate. Useofpulluporpulldownresistors  
with the bus-hold circuitry is not recommended.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
T
A
PACKAGE  
–40°C to 85°C LFBGA – GKE Tape and reel  
SN74AUCH32374GKER  
MK374  
†
Packagedrawings,standardpackingquantities,thermaldata,symbolization,andPCBdesignguidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus+ is a trademark of Texas Instruments.  
Copyright 2003, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

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SN74AUCH32374ZKER 替代型号

型号 品牌 替代类型 描述 数据表
SN74AUCH32374GKER TI

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 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

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