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SN74AUC2G66YEPR PDF预览

SN74AUC2G66YEPR

更新时间： 2024-11-15 22:09:51
品牌 Logo 应用领域
德州仪器 - TI 复用器开关复用器或开关信号电路
页数 文件大小 规格书
16页 322K
描述
DUAL BILATERAL ANALOG SWITCH

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中文翻译

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SN74AUC2G66YEPR 技术参数

是否Rohs认证：不符合生命周期：Obsolete
零件包装代码：BGA包装说明：DSBGA-8
针数：8Reach Compliance Code：not_compliant
HTS代码：8542.39.00.01风险等级：5.54
Is Samacsys：N模拟集成电路 - 其他类型：SPST
JESD-30 代码：R-XBGA-B8长度：1.9 mm
正常位置：NO信道数量：1
功能数量：2端子数量：8
标称断态隔离度：50 dB通态电阻匹配规范：3 Ω
最大通态电阻 (Ron)：40 Ω最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：VFBGA封装等效代码：BGA8,2X4,20
封装形状：RECTANGULAR封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：1.2/2.5 V
认证状态：Not Qualified座面最大高度：0.5 mm
子类别：Multiplexer or Switches最大供电电压 (Vsup)：2.7 V
最小供电电压 (Vsup)：0.8 V标称供电电压 (Vsup)：1.1 V
表面贴装：YES最长断开时间：4 ns
最长接通时间：3 ns技术：CMOS
温度等级：INDUSTRIAL端子形式：BALL
端子节距：0.5 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：0.9 mm
Base Number Matches：1

SN74AUC2G66YEPR 数据手册

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SCES507 − NOVEMBER 2003  
DCT OR DCU PACKAGE  
(TOP VIEW)  
D
Available in the Texas Instruments  
NanoStarand NanoFreePackages  
D
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Operates at 0.8 V to 2.7 V  
Sub 1-V Operable  
1A  
1B  
2C  
V
CC  
1
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8
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1C  
2B  
2A  
Max t of 0.5 ns at 1.8 V  
pd  
GND  
Low Power Consumption, 10 µA at 2.7 V  
High On-Off Output Voltage Ratio  
High Degree of Linearity  
YEP OR YZP PACKAGE  
(BOTTOM VIEW)  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
4 5  
3 6  
2 7  
1 8  
GND  
2C  
1B  
2A  
2B  
1C  
D
ESD Performance Tested Per JESD 22  
− 2000-V Human-Body Model  
(A114-B, Class II)  
− 200-V Machine Model (A115-A)  
− 1000-V Charged-Device Model (C101)  
1A  
V
CC  
description/ordering information  
This dual analog switch is operational at 0.8-V to 2.7-V V , but is designed specifically for 1.1-V to 2.7-V V  
CC  
operation.  
CC  
The SN74AUC2G66 can handle both analog and digital signals. It permits signals with amplitudes of up to 2.7-V  
(peak) to be transmitted in either direction.  
NanoStarand NanoFreepackage technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for  
analog-to-digital and digital-to-analog conversion systems.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
T
A
PACKAGE  
‡
NanoStar− WCSP (DSBGA)  
0.23-mm Large Bump − YEP  
Tape and reel SN74AUC2G66YEPR  
Tape and reel SN74AUC2G66YZPR  
_ _ _U6_  
NanoFree− WCSP (DSBGA)  
0.23-mm Large Bump − YZP (Pb-free)  
−40°C to 85°C  
SSOP − DCT  
Tape and reel  
Tape and reel  
SN74AUC2G66DCTR  
SN74AUC2G66DCUR  
U66_ _ _  
U66_  
VSSOP − DCU  
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.  
DCU: The actual top-side marking has one additional character that designates the assembly/test site.  
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one  
following character to designate the assembly/test site. Pin  
1 identifier indicates solder-bump composition  
(1 = SnPb, • = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar and NanoFree are trademarks of Texas Instruments.  
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Copyright 2003, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...16

中文翻译

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