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ꢊꢅꢄ ꢋ ꢌꢍ ꢋꢄꢎ ꢏꢐꢄꢋ ꢄꢁꢄ ꢋꢑ ꢈ ꢀ ꢒꢍ ꢎꢆ ꢓ
SCES507 − NOVEMBER 2003
DCT OR DCU PACKAGE
(TOP VIEW)
D
Available in the Texas Instruments
NanoStar and NanoFree Packages
D
D
D
D
D
D
D
Operates at 0.8 V to 2.7 V
Sub 1-V Operable
1A
1B
2C
V
CC
1
2
3
4
8
7
6
5
1C
2B
2A
Max t of 0.5 ns at 1.8 V
pd
GND
Low Power Consumption, 10 µA at 2.7 V
High On-Off Output Voltage Ratio
High Degree of Linearity
YEP OR YZP PACKAGE
(BOTTOM VIEW)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
4 5
3 6
2 7
1 8
GND
2C
1B
2A
2B
1C
D
ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
1A
V
CC
description/ordering information
This dual analog switch is operational at 0.8-V to 2.7-V V , but is designed specifically for 1.1-V to 2.7-V V
CC
operation.
CC
The SN74AUC2G66 can handle both analog and digital signals. It permits signals with amplitudes of up to 2.7-V
(peak) to be transmitted in either direction.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for
analog-to-digital and digital-to-analog conversion systems.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
‡
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
Tape and reel SN74AUC2G66YEPR
Tape and reel SN74AUC2G66YZPR
_ _ _U6_
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
−40°C to 85°C
SSOP − DCT
Tape and reel
Tape and reel
SN74AUC2G66DCTR
SN74AUC2G66DCUR
U66_ _ _
U66_
VSSOP − DCU
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin
1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
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Copyright 2003, Texas Instruments Incorporated
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