SN74AUC2G53
SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH OR
2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER
www.ti.com
SCES484A–AUGUST 2003–REVISED MARCH 2005
FEATURES
DCT OR DCU PACKAGE
(TOP VIEW)
•
Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
COM
INH
GND
GND
V
CC
1
2
3
4
8
7
6
5
•
•
•
•
•
•
Operates at 0.8 V to 2.7 V
Y1
Y2
A
Sub-1-V Operable
Low Power Consumption, 10 µA at 2.7 V
High On-Off Output Voltage Ratio
High Degree of Linearity
YEP OR YZP PACKAGE
(BOTTOM VIEW)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
4
3
2
1
5
6
7
8
GND
GND
INH
A
•
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
Y2
Y1
COM
V
CC
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This analog switch is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.1-V to 2.7-V VCC
operation.
The SN74AUC2G53 can handle both analog and digital signals. The device permits signals with amplitudes of up
to VCC (peak) to be transmitted in either direction.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for
analog-to-digital and digital-to-analog conversion systems.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING(2)
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
SN74AUC2G53YEPR
_ _ _U4_
Tape and reel
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
SN74AUC2G53YZPR
–40°C to 85°C
SSOP – DCT
Tape and reel
Tape and reel
SN74AUC2G53DCTR
SN74AUC2G53DCUR
U53_ _ _
U53_
VSSOP – DCU
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).
FUNCTION TABLE
CONTROL
INPUTS
ON
CHANNEL
INH
L
A
L
Y1
Y2
L
H
X
H
None
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.