Datasheet > 逻辑 > 栅极> SN74AUC2G34DBVR

SN74AUC2G34DBVR

更新时间： 2024-11-16 05:17:39

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
13页	529K
描述
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation

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SN74AUC2G34DBVR 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOT-23
包装说明：	LSSOP, TSOP6,.11,37	针数：	6
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	Factory Lead Time：	1 week
风险等级：	1.5	系列：	AUC
JESD-30 代码：	R-PDSO-G6	JESD-609代码：	e4
长度：	2.9 mm	负载电容（CL）：	15 pF
逻辑集成电路类型：	BUFFER	最大I（ol）：	0.009 A
湿度敏感等级：	1	功能数量：	2
输入次数：	1	端子数量：	6
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	LSSOP	封装等效代码：	TSOP6,.11,37
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
包装方法：	TR	峰值回流温度（摄氏度）：	260
电源：	1.2/2.5 V	最大电源电流（ICC）：	0.01 mA
Prop。Delay @ Nom-Sup：	3.4 ns	传播延迟（tpd）：	3.4 ns
认证状态：	Not Qualified	施密特触发器：	NO
座面最大高度：	1.45 mm	子类别：	Gates
最大供电电压 (Vsup)：	2.7 V	最小供电电压 (Vsup)：	0.8 V
标称供电电压 (Vsup)：	1.2 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)	端子形式：	GULL WING
端子节距：	0.95 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	1.6 mm
Base Number Matches：	1

SN74AUC2G34DBVR 数据手册

SN74AUC2G34

DUAL BUFFER GATE

www.ti.com

SCES514A–NOVEMBER 2003–REVISED MARCH 2006

FEATURES

•

Available in the Texas Instruments

NanoStar™ and NanoFree™ Packages

•

±8-mA Output Drive at 1.8 V

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

•

Optimized for 1.8-V Operation and Is 3.6-V I/O

Tolerant to Support Mixed-Mode Signal

Operation

•

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

•

I_offSupports Partial-Power-Down Mode

Operation

– 1000-V Charged-Device Model (C101)

•

Sub-1-V Operable

Max t_pdof 1.6 ns at 1.8 V

Low Power Consumption, 10 µA at 1.8 V

DBV PACKAGE

(TOP VIEW)

DCK PACKAGE

(TOP VIEW)

DRL PACKAGE

(TOP VIEW)

YEP PACKAGE

(BOTTOM VIEW)

V_CC

GND

V_CC

GND

V_CC

GND

DESCRIPTION/ORDERING INFORMATION

This dual buffer gate is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC

operation.

The SN74AUC2G34 performs the Boolean function Y = A in positive logic.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_offcircuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

T_A

PACKAGE⁽¹⁾

ORDERABLE PART NUMBER TOP-SIDE MARKING⁽²⁾

NanoStar™ – WCSP (DSBGA)

0.23-mm Large Bump – YEP

SN74AUC2G34YEPR

_ _ _U9_

Tape and reel

NanoFree™ – WCSP (DSBGA)

0.23-mm Large Bump – YZP (Pb-free)

SN74AUC2G34YZPR

–40°C to 85°C

SOT-563 – DRL

SOT-23 – DBV

SC-70 – DCK

Tape and reel

SN74AUC2G34DRLR

SN74AUC2G34DBVR

SN74AUC2G34DCKR

U9_

U34_

U9_

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.

YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...13

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SN74AUC2G34DBVR 替代型号

型号	品牌	替代类型	描述	数据表
SN74AUC2G34DBVRG4	TI	完全替代	DUAL BUFFER GATE
SN74AUC2G34DBVRE4	TI	完全替代	Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Opera

与SN74AUC2G34DBVR相关器件

型号	品牌	获取价格	描述	数据表
SN74AUC2G34DBVRE4	TI	获取价格	Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Opera
SN74AUC2G34DBVRG4	TI	获取价格	DUAL BUFFER GATE
SN74AUC2G34DCKR	TI	获取价格	Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Opera
SN74AUC2G34DCKRE4	TI	获取价格	Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Opera
SN74AUC2G34DCKRG4	TI	获取价格	DUAL BUFFER GATE
SN74AUC2G34DRLR	TI	获取价格	Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Opera
SN74AUC2G34DRLRG4	TI	获取价格	Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Opera
SN74AUC2G34YEAR	TI	获取价格	AUC SERIES, DUAL 1-INPUT NON-INVERT GATE, PBGA6, DSBGA-6
SN74AUC2G34YEPR	TI	获取价格	Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Opera
SN74AUC2G34YZAR	TI	获取价格	AUC SERIES, DUAL 1-INPUT NON-INVERT GATE, PBGA6, DSBGA-6

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