是否无铅: | 不含铅 | 是否Rohs认证: | 符合 |
生命周期: | Obsolete | 零件包装代码: | BGA |
包装说明: | ROHS COMPLIANT, DSBGA-8 | 针数: | 8 |
Reach Compliance Code: | compliant | HTS代码: | 8542.39.00.01 |
Factory Lead Time: | 1 week | 风险等级: | 5.63 |
Is Samacsys: | N | 系列: | AUC |
JESD-30 代码: | R-PBGA-B8 | JESD-609代码: | e1 |
长度: | 1.4 mm | 负载电容(CL): | 15 pF |
逻辑集成电路类型: | OR GATE | 最大I(ol): | 0.005 A |
湿度敏感等级: | 1 | 功能数量: | 2 |
输入次数: | 2 | 端子数量: | 8 |
最高工作温度: | 85 °C | 最低工作温度: | -40 °C |
输出特性: | 3-STATE | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | VFBGA | 封装等效代码: | BGA8,2X4,20 |
封装形状: | RECTANGULAR | 封装形式: | GRID ARRAY, VERY THIN PROFILE, FINE PITCH |
包装方法: | TAPE AND REEL | 峰值回流温度(摄氏度): | 260 |
电源: | 1.2/2.5 V | Prop。Delay @ Nom-Sup: | 3.3 ns |
传播延迟(tpd): | 3.3 ns | 认证状态: | Not Qualified |
施密特触发器: | NO | 座面最大高度: | 0.5 mm |
子类别: | Gates | 最大供电电压 (Vsup): | 2.7 V |
最小供电电压 (Vsup): | 0.8 V | 标称供电电压 (Vsup): | 1.2 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | INDUSTRIAL | 端子面层: | Tin/Silver/Copper (Sn/Ag/Cu) |
端子形式: | BALL | 端子节距: | 0.5 mm |
端子位置: | BOTTOM | 处于峰值回流温度下的最长时间: | NOT SPECIFIED |
宽度: | 0.9 mm | Base Number Matches: | 1 |
型号 | 品牌 | 替代类型 | 描述 | 数据表 |
SN74AUC2G32YZPR | TI |
类似代替 |
DUAL 2 INPUT POSITIVE OR GATE | |
SN74AUC2G32YEPR | TI |
功能相似 |
DUAL 2 INPUT POSITIVE OR GATE |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
SN74AUC2G34 | TI |
获取价格 |
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Opera | |
SN74AUC2G34_09 | TI |
获取价格 |
DUAL BUFFER GATE | |
SN74AUC2G34DBVR | TI |
获取价格 |
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Opera | |
SN74AUC2G34DBVRE4 | TI |
获取价格 |
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Opera | |
SN74AUC2G34DBVRG4 | TI |
获取价格 |
DUAL BUFFER GATE | |
SN74AUC2G34DCKR | TI |
获取价格 |
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Opera | |
SN74AUC2G34DCKRE4 | TI |
获取价格 |
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Opera | |
SN74AUC2G34DCKRG4 | TI |
获取价格 |
DUAL BUFFER GATE | |
SN74AUC2G34DRLR | TI |
获取价格 |
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Opera | |
SN74AUC2G34DRLRG4 | TI |
获取价格 |
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Opera |