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SN74AUC2G00YEPR PDF预览

SN74AUC2G00YEPR

更新时间: 2024-11-01 21:55:23
品牌 Logo 应用领域
德州仪器 - TI 栅极逻辑集成电路输入元件
页数 文件大小 规格书
11页 256K
描述
DUAL 2-INPUT POSITIVE-NAND GATE

SN74AUC2G00YEPR 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:BGA包装说明:DSBGA-8
针数:8Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.63Is Samacsys:N
系列:AUCJESD-30 代码:R-PBGA-B8
长度:1.9 mm负载电容(CL):15 pF
逻辑集成电路类型:NAND GATE最大I(ol):0.005 A
功能数量:2输入次数:2
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:VFBGA
封装等效代码:BGA8,2X4,20封装形状:RECTANGULAR
封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:1.2/2.5 V
Prop。Delay @ Nom-Sup:2.5 ns传播延迟(tpd):2.5 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:0.5 mm子类别:Gates
最大供电电压 (Vsup):2.7 V最小供电电压 (Vsup):0.8 V
标称供电电压 (Vsup):1.2 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:BALL端子节距:0.5 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:0.9 mmBase Number Matches:1

SN74AUC2G00YEPR 数据手册

 浏览型号SN74AUC2G00YEPR的Datasheet PDF文件第2页浏览型号SN74AUC2G00YEPR的Datasheet PDF文件第3页浏览型号SN74AUC2G00YEPR的Datasheet PDF文件第4页浏览型号SN74AUC2G00YEPR的Datasheet PDF文件第5页浏览型号SN74AUC2G00YEPR的Datasheet PDF文件第6页浏览型号SN74AUC2G00YEPR的Datasheet PDF文件第7页 
SN74AUC2G00  
DUAL 2-INPUT POSITIVE-NAND GATE  
www.ti.com  
SCES440AMAY 2003REVISED MARCH 2005  
FEATURES  
DCT OR DCU PACKAGE  
(TOP VIEW)  
Available in the Texas Instruments  
NanoStar™ and NanoFree™ Packages  
1A  
1B  
2Y  
V
CC  
1
2
3
4
8
7
6
5
Optimized for 1.8-V Operation and Is 3.6-V I/O  
Tolerant to Support Mixed-Mode Signal  
Operation  
1Y  
2B  
2A  
GND  
Ioff Supports Partial-Power-Down Mode  
Operation  
YEP OR YZP PACKAGE  
(BOTTOM VIEW)  
Sub-1-V Operable  
Max tpd of 1.2 ns at 1.8 V  
Low Power Consumption, 10 µA at 1.8 V  
±8-mA Output Drive at 1.8 V  
4
3
2
1
5
6
7
8
GND  
2Y  
2A  
2B  
1Y  
1B  
1A  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
V
CC  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
This dual 2-input positive-NAND gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V  
to 1.95-V VCC operation.  
The SN74AUC2G00 performs the Boolean function Y = A B or Y = A + B in positive logic.  
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING(2)  
NanoStar™ – WCSP (DSBGA)  
0.23-mm Large Bump – YEP  
Tape and reel  
Tape and reel  
SN74AUC2G00YEPR  
_ _ _UA_  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
SN74AUC2G00YZPR  
–40°C to 85°C  
SSOP – DCT  
Tape and reel  
Tape and reel  
SN74AUC2G00DCTR  
SN74AUC2G00DCUR  
U00_  
U00_  
VSSOP – DCU  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.  
DCU: The actual top-side marking has one additional character that designates the assembly/test site.  
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following  
character to designate the assembly/test site.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar, NanoFree are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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