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SN74AS823ANT

更新时间： 2024-09-30 23:03:11
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
7页 114K
描述
9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

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SN74AS823ANT 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：DIP
包装说明：DIP, DIP24,.3针数：24
Reach Compliance Code：unknownHTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：5.39
其他特性：WITH CLEAR AND CLOCK ENABLE系列：AS
JESD-30 代码：R-PDIP-T24JESD-609代码：e4
长度：31.64 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER位数：9
功能数量：1端口数量：2
端子数量：24最高工作温度：70 °C
最低工作温度：输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装等效代码：DIP24,.3
封装形状：RECTANGULAR封装形式：IN-LINE
包装方法：TUBE峰值回流温度（摄氏度）：NOT SPECIFIED
最大电源电流（ICC）：100 mA传播延迟（tpd）：13 ns
认证状态：Not Qualified座面最大高度：5.08 mm
子类别：FF/Latches最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：TTL
温度等级：COMMERCIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：POSITIVE EDGE宽度：7.62 mm
Base Number Matches：1

SN74AS823ANT 数据手册

 浏览型号SN74AS823ANT的Datasheet PDF文件第2页浏览型号SN74AS823ANT的Datasheet PDF文件第3页浏览型号SN74AS823ANT的Datasheet PDF文件第4页浏览型号SN74AS823ANT的Datasheet PDF文件第5页浏览型号SN74AS823ANT的Datasheet PDF文件第6页浏览型号SN74AS823ANT的Datasheet PDF文件第7页 
SN54AS823A, SN74AS823A, SN74AS824A  
9-BIT BUS-INTERFACE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SDAS231A – JUNE 1984 – REVISED AUGUST 1995  
SN54AS823A . . . JT PACKAGE  
SN74AS823A . . . DW OR NT PACKAGE  
(TOP VIEW)  
• Functionally Equivalent to AMD’s AM29823  
and AM29824  
• Provide Extra Data Width Necessary for  
Wider Address/Data Paths or Buses With  
Parity  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1
2
3
4
5
6
7
8
9
24  
23 1Q  
22 2Q  
21 3Q  
20 4Q  
19 5Q  
18 6Q  
17 7Q  
16 8Q  
15 9Q  
14 CLKEN  
13 CLK  
• Outputs Have Undershoot-Protection  
Circuitry  
• Power-Up High-Impedance State  
• Buffered Control Inputs to Reduce  
dc Loading Effects  
• Package Options Include Plastic  
Small-Outline (DW) Packages, Ceramic  
Chip Carriers (FK), and Standard Plastic  
(NT) and Ceramic (JT) 300-mil DIPs  
9D 10  
CLR 11  
GND 12  
description  
SN54AS823A . . . FK PACKAGE  
(TOP VIEW)  
These 9-bit flip-flops feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. These devices  
are particularly suitable for implementing wider  
buffer registers, I/O ports, bidirectional bus  
drivers, parity bus interfacing, and working  
registers.  
4
3
2
1
28 27 26  
25  
3D  
4D  
5D  
NC  
6D  
7D  
8D  
3Q  
4Q  
5Q  
NC  
6Q  
7Q  
8Q  
5
24  
23  
22  
21  
20  
19  
6
7
With the clock-enable (CLKEN) input low, the nine  
D-type edge-triggered flip-flops enter data on the  
low-to-high transitions of the clock (CLK) input.  
Taking CLKEN high disables the clock buffer,  
latching the outputs. The SN54AS823A and  
SN74AS823A have noninverting data (D) inputs  
and the SN74AS824A has inverting (D) inputs.  
Taking the clear (CLR) input low causes the nine  
Q outputs to go low independently of the clock.  
8
9
10  
11  
12 13 14 15 16 17 18  
SN74AS824A . . . DW OR NT PACKAGE  
(TOP VIEW)  
A buffered output-enable (OE) input can be used  
to place the nine outputs in either a normal logic  
state (high or low logic level) or the high-  
impedance state. In the high-impedance state, the  
outputs neither load nor drive the bus lines  
significantly. The high-impedance state and  
increased drive provide the capability to drive bus  
lines without interface or pullup components.  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
1
2
3
4
5
6
7
8
9
24  
V
CC  
23 1Q  
22 2Q  
21 3Q  
20 4Q  
19 5Q  
18 6Q  
17 7Q  
16 8Q  
15 9Q  
14 CLKEN  
13 CLK  
OE does not affect the internal operation of the  
flip-flops. Old data can be retained or new data  
can be entered while the outputs are in the  
high-impedance state.  
9D 10  
CLR 11  
GND 12  
The SN54AS823A is characterized for operation  
over the full military temperature range of –55°C  
to 125°C. The SN74AS823A and SN74AS824A  
are characterized for operation from 0°C to 70°C.  
NC – No internal connection  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

中文翻译

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SN74AS823ANT 替代型号

型号 品牌 替代类型 描述 数据表
SN74AS823ADW TI

完全替代

 9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
5962-8952501LA TI

类似代替

 具有三态输出的 9 位总线接口触发器 | JT | 24 | -55 to 125
SN74AS821ADW TI

类似代替

 10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

与SN74AS823ANT相关器件

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SN74AS823FN TI

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 		AS SERIES, 9-BIT DRIVER, TRUE OUTPUT, PQCC28, PLASTIC, LCC-28
SN74AS823NT1 TI

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 		IC,FLIP-FLOP,9-BIT,D TYPE,AS-TTL,DIP,24PIN,PLASTIC
SN74AS823NTP1 TI

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 		IC,FLIP-FLOP,9-BIT,D TYPE,AS-TTL,DIP,24PIN,PLASTIC
SN74AS824FN-00 TI

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 		AS SERIES, 9-BIT DRIVER, INVERTED OUTPUT, PQCC28
SN74AS824NT3 TI

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 		AS SERIES, 9-BIT DRIVER, INVERTED OUTPUT, PDIP24
SN74AS824NTP3 TI

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 		SN74AS824NTP3
SN74AS825A TI

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 		8-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74AS825ADW TI

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 		8-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74AS825ADWE4 TI

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 		IC AS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO24, PLASTIC, SO-24, Bus Driver/Transceiver
SN74AS825ADWG4 TI

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 		AS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO24, PLASTIC, SO-24

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