SN74AS573A

更新时间： 2024-11-14 22:39:15

品牌	Logo	应用领域
德州仪器 - TI		锁存器输出元件
页数	文件大小	规格书
9页	134K
描述
OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

SN74AS573A 数据手册

SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A

OCTAL D-TYPE TRANSPARENT LATCHES

WITH 3-STATE OUTPUTS

SDAS048D – DECEMBER 1989 – REVISED JANUARY 1995

SN54ALS573C, SN54AS573A . . . J OR W PACKAGE

SN74ALS573C, SN74AS573A . . . DW OR N PACKAGE

(TOP VIEW)

• 3-State Buffer-Type Outputs Drive Bus

Lines Directly

• Bus-Structured Pinout

• True Logic Outputs

• Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic

Chip Carriers (FK), Standard Plastic (N) and

Ceramic (J) 300-mil DIPs, and Ceramic Flat

(W) Packages

description

13 7Q

12 8Q

These octal D-type transparent latches feature

3-state outputs designed specifically for driving

highly capacitive or relatively low-impedance

loads. They are particularly suitable for

implementing buffer registers, I/O ports,

bidirectional bus drivers, and working registers.

GND

SN54ALS573C, SN54AS573A . . . FK PACKAGE

(TOP VIEW)

While the latch-enable (LE) input is high, outputs

(Q) respond to the data (D) inputs. When LE islow,

the outputs are latched to retain the data that was

set up.

20 19

A buffered output-enable (OE) input can be used

to place the eight outputs in either a normal logic

state (high or low) or a high-impedance state. In

thehigh-impedancestate, theoutputsneitherload

nor drive the bus lines significantly. The

high-impedance state and the increased drive

provide the capability to drive bus lines without

interface or pullup components.

9 10 11 12 13

OE does not affect internal operation of the

latches. Old data can be retained or new data can

be entered while the outputs are in the

high-impedance state.

The SN54ALS573C and SN54AS573A are characterized for operation over the full military temperature range

of –55°C to 125°C. The SN74ALS573C and SN74AS573A are characterized for operation from 0°C to 70°C.

FUNCTION TABLE

(each latch)

INPUTS

OUTPUT

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...9

中文翻译

下载PDF

与SN74AS573A相关器件

型号	品牌	获取价格	描述	数据表
SN74AS573ADW	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74AS573ADWE4	TI	获取价格	AS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SO-20
SN74AS573ADWR	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74AS573ADWRG4	TI	获取价格	Octal D-Type Transparent Latches With 3-State Outputs 20-SOIC 0 to 70
SN74AS573AN	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74AS573AN3	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74AS573DW	TI	获取价格	IC AS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, Bus Driver/Transceiver
SN74AS573DW3	TI	获取价格	IC,LATCH,SINGLE,8-BIT,AS-TTL,SOP,20PIN,PLASTIC
SN74AS573DWR	TI	获取价格	AS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
SN74AS573FN	TI	获取价格	IC,LATCH,SINGLE,8-BIT,AS-TTL,LDCC,20PIN,PLASTIC

与SN74AS573A相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

6
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

3
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

29
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

12

产品中心

服务支持

精选活动

关于我们

帮助中心

SN74AS573A

SN74AS573A 数据手册

与SN74AS573A相关器件

与SN74AS573A相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SN74AS573A

SN74AS573A 数据手册

与SN74AS573A相关器件

与SN74AS573A相关文章

您还可以找

您在本页遇到什么问题？