5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 总线驱动器/收发器> SN74ALVTH16821
SN74ALVTH16821 PDF预览

SN74ALVTH16821

更新时间： 2024-11-18 23:06:15
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
11页 198K
描述
2.5-V/3.3-V 20-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

SN74ALVTH16821 数据手册

 浏览型号SN74ALVTH16821的Datasheet PDF文件第2页浏览型号SN74ALVTH16821的Datasheet PDF文件第3页浏览型号SN74ALVTH16821的Datasheet PDF文件第4页浏览型号SN74ALVTH16821的Datasheet PDF文件第5页浏览型号SN74ALVTH16821的Datasheet PDF文件第6页浏览型号SN74ALVTH16821的Datasheet PDF文件第7页 
SN54ALVTH16821, SN74ALVTH16821  
2.5-V/3.3-V 20-BIT BUS-INTERFACE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SCES078E – JULY 1996 – REVISED JANUARY 1999  
SN54ALVTH16821 . . . WD PACKAGE  
SN74ALVTH16821 . . . DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Widebus Design for  
2.5-V and 3.3-V Operation and Low Static  
Power Dissipation  
1OE  
1Q1  
1Q2  
GND  
1Q3  
1Q4  
1CLK  
1D1  
1D2  
GND  
1D3  
1D4  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
Support Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 2.3-V to  
2
3
3.6-V V  
)
CC  
4
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
5
OLP  
= 3.3 V, T = 25°C  
CC  
A
6
V
V
7
High-Drive (–24/24 mA at 2.5-V and  
–32/64 mA at 3.3-V V  
CC  
CC  
1Q5  
1Q6  
1Q7  
GND  
1Q8  
1Q9  
1Q10  
2Q1  
2Q2  
2Q3  
GND  
2Q4  
2Q5  
2Q6  
1D5  
1D6  
1D7  
GND  
1D8  
1D9  
1D10  
2D1  
2D2  
2D3  
GND  
2D4  
2D5  
2D6  
)
8
CC  
9
Power Off Disables Outputs, Permitting  
Live Insertion  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
High-Impedance State During Power Up  
and Power Down Prevents Driver Conflict  
Uses Bus Hold on Data Inputs in Place of  
External Pullup/Pulldown Resistors to  
Prevent the Bus From Floating  
Auto3-State Eliminates Bus Current  
Loading When Output Exceeds V  
+ 0.5 V  
CC  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model; and Exceeds 1000 V  
Using Charged-Device Model, Robotic  
Method  
V
V
CC  
CC  
2Q7  
2Q8  
GND  
2Q9  
2Q10  
2OE  
2D7  
2D8  
GND  
2D9  
2D10  
2CLK  
Flow-Through Architecture Facilitates  
Printed Circuit Board Layout  
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
Package Options Include Plastic Shrink  
Small-Outline (DL), Thin Shrink  
Small-Outline (DGG), Thin Very  
Small-Outline (DGV) Packages, and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
description  
The ’ALVTH16821 devices are 20-bit bus-interface flip-flops with 3-state outputs designed for 2.5-V or 3.3-V  
operation, but with the capability to provide a TTL interface to a 5-V system environment.  
V
CC  
The devices can be used as two 10-bit flip-flops or one 20-bit flip-flop. The 20-bit flip-flops are edge-triggered  
D-type flip-flops. On the positive transition of the clock (CLK), the flip-flops store the logic levels set up at the  
D inputs.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

中文翻译

下载PDF

与SN74ALVTH16821相关器件

型号 品牌 获取价格 描述 数据表
SN74ALVTH16821DGG TI

获取价格

 		2.5-V/3.3-V 20-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ALVTH16821DGGR TI

获取价格

 		ALVT SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56, PLASTIC, TSSOP-56
SN74ALVTH16821DGV TI

获取价格

 		2.5-V/3.3-V 20-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ALVTH16821DGVR TI

获取价格

 		ALVT SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56, PLASTIC, TVSOP-56
SN74ALVTH16821DL TI

获取价格

 		2.5-V/3.3-V 20-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ALVTH16821VR TI

获取价格

 		2.5-V/3.3-V 20-Bit Bus-Interface Flip-Flops With 3-State Outputs 56-TVSOP -40 to 85
SN74ALVTH16827 TI

获取价格

 		2.5-V/3.3-V 20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74ALVTH16827_07 TI

获取价格

 		2.5-V/3.3-V 20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74ALVTH16827DGG TI

获取价格

 		2.5-V/3.3-V 20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74ALVTH16827DGGR TI

获取价格

 		暂无描述

与SN74ALVTH16821相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证