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SN74ALVCHS162830DBBR PDF预览

SN74ALVCHS162830DBBR

更新时间： 2024-11-06 13:13:47
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件双倍数据速率
页数 文件大小 规格书
7页 99K
描述
1-Bit to 2-Bit Address Driver With 3-State Outputs 80-TSSOP -40 to 85

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SN74ALVCHS162830DBBR 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP, TSSOP80,.3,16针数：80
Reach Compliance Code：not_compliant风险等级：5.32
系列：ALVC/VCX/AJESD-30 代码：R-PDSO-G80
长度：17 mm逻辑集成电路类型：BUS DRIVER
位数：18功能数量：1
端口数量：2端子数量：80
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE WITH SERIES RESISTOR输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP80,.3,16封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3.3 V传播延迟（tpd）：4 ns
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：Other Logic ICs最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.3 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.4 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：6.1 mm
Base Number Matches：1

SN74ALVCHS162830DBBR 数据手册

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SN74ALVCHS162830  
1-BIT TO 2-BIT ADDRESS DRIVER  
WITH 3-STATE OUTPUTS  
SCES097F – APRIL 1997 – REVISED JUNE 1999  
DBB PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
2Y2  
1Y2  
GND  
2Y1  
1Y3  
2Y3  
GND  
1Y4  
2Y4  
1
80  
79  
78  
77  
76  
75  
74  
73  
72  
71  
70  
69  
68  
67  
66  
65  
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63  
62  
61  
60  
59  
58  
57  
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54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
2
Output Ports Have Equivalent 26-Ω Series  
Resistors, So No External Resistors Are  
Required  
3
4
1Y1  
5
Diodes on Inputs Clamp Overshoot  
V
V
6
CC  
CC  
A1  
A2  
GND  
A3  
A4  
GND  
A5  
A6  
1Y5  
2Y5  
GND  
1Y6  
2Y6  
GND  
1Y7  
2Y7  
7
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
V
V
CC  
CC  
Packaged in Thin Very Small-Outline  
Package  
A7  
A8  
GND  
A9  
OE1  
OE2  
A10  
GND  
A11  
A12  
1Y8  
2Y8  
GND  
1Y9  
2Y9  
1Y10  
2Y10  
GND  
1Y11  
2Y11  
NOTE: For order entry:  
The DBB package is abbreviated to G.  
For tape and reel:  
The DBBR package is abbreviated to GR.  
description  
This 1-bit to 2-bit address driver is designed for  
2.3-V to 3.6-V V operation.  
CC  
V
V
CC  
CC  
A13  
A14  
GND  
A15  
A16  
GND  
A17  
A18  
1Y12  
2Y12  
GND  
1Y13  
2Y13  
GND  
1Y14  
2Y14  
Diodes to V  
clamp overshoot.  
have been added on the inputs to  
CC  
Active bus-hold circuitry is provided to hold  
unused or floating data inputs at a valid logic level.  
The outputs, which are designed to sink up to  
12 mA, include equivalent 26-Ω series resistors to  
reduce overshoot and undershoot.  
V
V
CC  
CC  
To ensure the high-impedance state during power  
up or power down, the output-enable (OE) input  
2Y18  
1Y18  
GND  
2Y17  
1Y17  
1Y15  
2Y15  
GND  
1Y16  
2Y16  
shouldbetiedtoV throughapullupresistor;the  
CC  
minimum value of the resistor is determined by the  
current-sinking capability of the driver.  
The SN74ALVCHS162830 is characterized for  
operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

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