5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 总线驱动器/收发器> SN74ALVCH16835DGG
SN74ALVCH16835DGG PDF预览

SN74ALVCH16835DGG

更新时间： 2024-09-15 23:09:43
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
10页 138K
描述
18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

SN74ALVCH16835DGG 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP,
针数：56Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.14
系列：ALVC/VCX/AJESD-30 代码：R-PDSO-G56
JESD-609代码：e4长度：14 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
湿度敏感等级：1位数：18
功能数量：1端口数量：2
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
传播延迟（tpd）：5.5 ns认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.65 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：NICKEL PALLADIUM GOLD
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：6.1 mmBase Number Matches：1

SN74ALVCH16835DGG 数据手册

 浏览型号SN74ALVCH16835DGG的Datasheet PDF文件第2页浏览型号SN74ALVCH16835DGG的Datasheet PDF文件第3页浏览型号SN74ALVCH16835DGG的Datasheet PDF文件第4页浏览型号SN74ALVCH16835DGG的Datasheet PDF文件第5页浏览型号SN74ALVCH16835DGG的Datasheet PDF文件第6页浏览型号SN74ALVCH16835DGG的Datasheet PDF文件第7页 
SN74ALVCH16835  
18-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
SCES053E – SEPTEMBER 1995 – REVISED FEBRUARY 1999  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
NC  
NC  
Y1  
GND  
Y2  
Y3  
GND  
NC  
A1  
GND  
A2  
A3  
2
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
3
4
5
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
6
7
V
V
CC  
Y4  
CC  
8
A4  
A5  
A6  
GND  
A7  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
9
Y5  
Y6  
GND  
Y7  
Y8  
Y9  
Y10  
Y11  
Y12  
GND  
Y13  
Y14  
Y15  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
Package Options Include Plastic Shrink  
Small-Outline (DL), Thin Shrink  
Small-Outline (DGG), and Thin Very  
Small-Outline (DGV) Packages  
A8  
A9  
A10  
A11  
A12  
GND  
A13  
A14  
A15  
description  
This 18-bit universal bus driver is designed for  
1.65-V to 3.6-V V operation.  
CC  
Data flow from A to Y is controlled by the  
output-enable (OE) input. The device operates in  
the transparent mode when the latch-enable (LE)  
input is high. The A data is latched if the clock  
(CLK) input is held at a high or low logic level. If LE  
is low, the A data is stored in the latch/flip-flop on  
the low-to-high transition of CLK. When OE is  
high, the outputs are in the high-impedance state.  
V
V
CC  
CC  
Y16  
Y17  
GND  
Y18  
OE  
A16  
A17  
GND  
A18  
CLK  
GND  
LE  
To ensure the high-impedance state during power  
up or power down, OE should be tied to V  
CC  
NC – No internal connection  
through a pullup resistor; the minimum value of  
the resistor is determined by the current-sinking  
capability of the driver.  
Active bus-hold circuitry is provided to hold  
unused or floating data inputs at a valid logic level.  
The SN74ALVCH16835 is characterized for  
operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...10

中文翻译

下载PDF

SN74ALVCH16835DGG 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALVCH16835DGGR TI

类似代替

 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVC16835DGGR TI

功能相似

 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVC16835DGG TI

功能相似

 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

与SN74ALVCH16835DGG相关器件

型号 品牌 获取价格 描述 数据表
SN74ALVCH16835DGGR TI

获取价格

 		18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16835DGV TI

获取价格

 		18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16835DGVR TI

获取价格

 		18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16835DL TI

获取价格

 		18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16835DLR TI

获取价格

 		18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16835KR TI

获取价格

 		18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16836 TI

获取价格

 		20-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16836DGG TI

获取价格

 		20-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16836DGGR TI

获取价格

 		ALVC/VCX/A SERIES, 20-BIT DRIVER, TRUE OUTPUT, PDSO56, PLASTIC, TSSOP-56
SN74ALVCH16836DL TI

获取价格

 		20-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

与SN74ALVCH16835DGG相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证