5秒后页面跳转
捷配首页

Datasheet > 暂无类别数据> SN74ALVCH16831DBBR
SN74ALVCH16831DBBR PDF预览

SN74ALVCH16831DBBR

更新时间： 2024-11-19 05:29:35
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件双倍数据速率
页数 文件大小 规格书
9页 132K
描述
1-TO-4 ADDRESS REGISTER/DRIVER WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

SN74ALVCH16831DBBR 数据手册

 浏览型号SN74ALVCH16831DBBR的Datasheet PDF文件第2页浏览型号SN74ALVCH16831DBBR的Datasheet PDF文件第3页浏览型号SN74ALVCH16831DBBR的Datasheet PDF文件第4页浏览型号SN74ALVCH16831DBBR的Datasheet PDF文件第5页浏览型号SN74ALVCH16831DBBR的Datasheet PDF文件第6页浏览型号SN74ALVCH16831DBBR的Datasheet PDF文件第7页 
SN74ALVCH16831  
1-TO-4 ADDRESS REGISTER/DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES083F–AUGUST 1996–REVISED SEPTEMBER 2004  
FEATURES  
DBB PACKAGE  
(TOP VIEW)  
•
•
•
•
Member of the Texas Instruments Widebus™  
Family  
4Y1  
3Y1  
GND  
2Y1  
1Y1  
1Y2  
2Y2  
GND  
3Y2  
4Y2  
80  
79  
78  
77  
76  
75  
74  
73  
72  
71  
70  
69  
68  
67  
66  
65  
64  
63  
62  
61  
60  
59  
58  
57  
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
1
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
2
3
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
4
5
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
V
CC  
V
6
CC  
1Y3  
2Y3  
GND  
3Y3  
4Y3  
GND  
1Y4  
2Y4  
NC  
A1  
7
8
GND  
NC  
– 1000-V Charged-Device Model (C101)  
9
10  
11  
12  
13  
14  
15  
DESCRIPTION/ORDERING INFORMATION  
A2  
GND  
NC  
This 1-bit to 4-bit address register/driver is designed  
for 1.65-V to 3.6-V VCC operation. The device is ideal  
for use in applications in which a single address bus  
is driving four separate memory locations. The  
SN74ALVCH16831 can be used as a buffer or a  
register, depending on the logic level of the select  
(SEL) input.  
A3  
V
CC  
V
CC  
3Y4  
4Y4  
GND  
1Y5  
2Y5  
3Y5  
4Y5  
GND  
1Y6  
2Y6  
NC 16  
17  
GND 18  
A4  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
CLK  
OE1  
OE2  
SEL  
GND  
A5  
When SEL is logic high, the device is in the buffer  
mode. The outputs follow the inputs and are  
controlled by the two output-enable (OE) controls.  
Each OE controls two groups of nine outputs.  
When SEL is logic low, the device is in the register  
mode. The register is an edge-triggered D-type  
flip-flop. On the positive transition of the clock (CLK)  
input, data set up at the A inputs is stored in the  
internal registers. OE controls operate the same as in  
buffer mode.  
A6  
V
CC  
V
CC  
3Y6  
4Y6  
GND  
1Y7  
2Y7  
GND  
3Y7  
4Y7  
A7  
NC  
GND  
A8  
When OE is logic low, the outputs are in a normal  
logic state (high or low logic level). When OE is logic  
high, the outputs are in the high-impedance state.  
NC  
GND  
A9  
SEL and OE do not affect the internal operation of  
the flip-flops. Old data can be retained or new data  
can be entered while the outputs are in the  
high-impedance state.  
NC  
V
CC  
V
CC  
1Y8  
2Y8  
GND  
3Y8  
4Y8  
4Y9  
3Y9  
GND  
2Y9  
1Y9  
To ensure the high-impedance state during power up  
or power down, OE should be tied to VCC through a  
pullup resistor; the minimum value of the resistor is  
determined by the current-sinking capability of the  
driver.  
Active bus-hold circuitry holds unused or undriven  
inputs at a valid logic state. Use of pullup or pulldown  
resistors with the bus-hold circuitry is not  
recommended.  
NC − No internal connection  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1996–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...9

中文翻译

下载PDF

SN74ALVCH16831DBBR 替代型号

型号 品牌 替代类型 描述 数据表
74ALVCH16831DBBRG4 TI

完全替代

 1-TO-4 ADDRESS REGISTER/DRIVER WITH 3-STATE OUTPUTS
74ALVCH16831DBBRE4 TI

完全替代

 1-TO-4 ADDRESS REGISTER/DRIVER WITH 3-STATE OUTPUTS

与SN74ALVCH16831DBBR相关器件

型号 品牌 获取价格 描述 数据表
SN74ALVCH16832 TI

获取价格

 		1-TO-4 ADDRESS REGISTER/DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16832_08 TI

获取价格

 		1-TO-4 ADDRESS REGISTER/DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16832DGG TI

获取价格

 		1-TO-4 ADDRESS REGISTER/DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16832DGGR TI

获取价格

 		1-To-4 Address Register/Driver With 3-State Outputs 64-TSSOP -40 to 85
SN74ALVCH16834 TI

获取价格

 		18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16834DGG TI

获取价格

 		暂无描述
SN74ALVCH16834DGGR TI

获取价格

 		ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, TSSOP-56
SN74ALVCH16834DGV TI

获取价格

 		ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, PLASTIC, TVSOP-56
SN74ALVCH16834DGVR TI

获取价格

 		ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, TVSOP-56
SN74ALVCH16834DL TI

获取价格

 		ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, PLASTIC, SSOP-56

与SN74ALVCH16831DBBR相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证