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SN74ALVCH16825 PDF预览

SN74ALVCH16825

更新时间： 2024-11-18 23:09:43
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德州仪器 - TI 驱动器输出元件
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8页 115K
描述
18-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

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SN74ALVCH16825 数据手册

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SN74ALVCH16825  
18-BIT BUFFER/DRIVER  
WITH 3-STATE OUTPUTS  
SCES039C – JULY 1995 – REVISED FEBRUARY 1999  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1OE1  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
1OE2  
1A1  
1A2  
GND  
1A3  
1A4  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
2
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
3
4
5
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
6
V
V
7
CC  
CC  
1Y5  
1Y6  
1Y7  
GND  
1Y8  
1A5  
1A6  
1A7  
GND  
1A8  
8
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
9
10  
11  
12  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
1Y9 13  
GND 14  
GND 15  
2Y1 16  
44 1A9  
43 GND  
42 GND  
41 2A1  
description  
This 18-bit buffer and line driver is designed for  
1.65-V to 3.6-V V operation.  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
2Y2  
GND  
2Y3  
2Y4  
2Y5  
2A2  
GND  
2A3  
2A4  
2A5  
CC  
This  
SN74ALVCH16825  
improves  
the  
performance and density of 3-state memory  
address drivers, clock drivers, and bus-oriented  
receivers and transmitters.  
V
V
CC  
CC  
2Y6  
2Y7  
GND  
2Y8  
2Y9  
2OE1  
2A6  
2A7  
GND  
2A8  
2A9  
The device can be used as two 9-bit buffers or one  
18-bit buffer. It provides true data.  
The 3-state control gate is a 2-input AND gate with  
active-low inputs so that if either output-enable  
(OE1 or OE2) input is high, all nine affected  
outputs are in the high-impedance state.  
2OE2  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.  
The SN74ALVCH16825 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each 9-bit section)  
INPUTS  
OUTPUT  
Y
OE2  
L
A
L
OE1  
L
L
H
Z
Z
L
L
H
X
X
H
X
X
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345678

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