5秒后页面跳转
SN74ALVCH16820DL PDF预览

SN74ALVCH16820DL

更新时间: 2024-11-18 23:09:43
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
9页 125K
描述
3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

SN74ALVCH16820DL 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP, SSOP56,.4针数:56
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.37系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G56长度:18.415 mm
负载电容(CL):30 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:150000000 Hz最大I(ol):0.024 A
位数:10功能数量:1
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP56,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 VProp。Delay @ Nom-Sup:4.8 ns
传播延迟(tpd):5.9 ns认证状态:Not Qualified
座面最大高度:2.79 mm子类别:FF/Latches
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.49 mm
Base Number Matches:1

SN74ALVCH16820DL 数据手册

 浏览型号SN74ALVCH16820DL的Datasheet PDF文件第2页浏览型号SN74ALVCH16820DL的Datasheet PDF文件第3页浏览型号SN74ALVCH16820DL的Datasheet PDF文件第4页浏览型号SN74ALVCH16820DL的Datasheet PDF文件第5页浏览型号SN74ALVCH16820DL的Datasheet PDF文件第6页浏览型号SN74ALVCH16820DL的Datasheet PDF文件第7页 
SN74ALVCH16820  
3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS  
AND 3-STATE OUTPUTS  
SCES035E – JULY 1995 – REVISED FEBRUARY 1999  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1OE  
1Q1  
1Q2  
GND  
2Q1  
2Q2  
CLK  
D1  
NC  
GND  
D2  
NC  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
2
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
3
4
5
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
6
V
V
7
CC  
CC  
3Q1  
3Q2  
4Q1  
GND  
4Q2  
5Q1  
5Q2  
6Q1  
6Q2  
7Q1  
GND  
7Q2  
8Q1  
8Q2  
D3  
NC  
D4  
GND  
NC  
D5  
NC  
D6  
NC  
D7  
GND  
NC  
D8  
8
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
description  
This 10-bit flip-flop is designed for 1.65-V to 3.6-V  
operation.  
V
CC  
The flip-flops of the SN74ALVCH16820 are  
edge-triggered D-type flip-flops. On the positive  
transition of the clock (CLK) input, the device  
provides true data at the Q outputs.  
NC  
V
V
CC  
CC  
9Q1  
9Q2  
GND  
10Q1  
10Q2  
2OE  
D9  
NC  
GND  
D10  
NC  
A buffered output-enable (OE) input can be used  
to place the ten outputs in either a normal logic  
state (high or low logic level) or the  
high-impedance state. In the high-impedance  
state, the outputs neither load nor drive the bus  
lines significantly. The high-impedance state and  
increased drive provide the capability to drive bus  
lines without need for interface or pullup  
components.  
NC  
NC – No internal connection  
OE input does not affect the internal operation of the flip-flops. Old data can be retained or new data can be  
entered while the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVCH16820 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74ALVCH16820DL 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALVCH162820DLR TI

完全替代

ALVC/VCX/A SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, SSOP-56
SN74ALVCH162820DL TI

完全替代

3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

与SN74ALVCH16820DL相关器件

型号 品牌 获取价格 描述 数据表
SN74ALVCH16821 TI

获取价格

3.3-V 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16821_08 TI

获取价格

3.3-V 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16821DGG TI

获取价格

3.3-V 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16821DGGR TI

获取价格

3.3-V 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16821DL TI

获取价格

3.3-V 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16821DLR TI

获取价格

3.3-V 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16823 TI

获取价格

18-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16823DGG TI

获取价格

18-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16823DGGR TI

获取价格

具有三态输出的 18 位总线接口触发器 | DGG | 56 | -40 to 85
SN74ALVCH16823DGVR TI

获取价格

具有三态输出的 18 位总线接口触发器 | DGV | 56 | -40 to 85