5秒后页面跳转
SN74ALVCH16373GRDR PDF预览

SN74ALVCH16373GRDR

更新时间: 2024-11-21 02:59:23
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器锁存器逻辑集成电路输出元件
页数 文件大小 规格书
19页 489K
描述
16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

SN74ALVCH16373GRDR 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:TFBGA, BGA54,6X9,32针数:54
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.57Is Samacsys:N
系列:ALVC/VCX/AJESD-30 代码:R-PBGA-B54
长度:8 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.024 A
位数:8功能数量:2
端口数量:2端子数量:54
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA54,6X9,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH包装方法:TAPE AND REEL
电源:3.3 VProp。Delay @ Nom-Sup:3.6 ns
传播延迟(tpd):4.9 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM宽度:5.5 mm
Base Number Matches:1

SN74ALVCH16373GRDR 数据手册

 浏览型号SN74ALVCH16373GRDR的Datasheet PDF文件第2页浏览型号SN74ALVCH16373GRDR的Datasheet PDF文件第3页浏览型号SN74ALVCH16373GRDR的Datasheet PDF文件第4页浏览型号SN74ALVCH16373GRDR的Datasheet PDF文件第5页浏览型号SN74ALVCH16373GRDR的Datasheet PDF文件第6页浏览型号SN74ALVCH16373GRDR的Datasheet PDF文件第7页 
SN74ALVCH16373  
16-BIT TRANSPARENT D-TYPE LATCH  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES020IJULY 1995REVISED NOVEMBER 2005  
FEATURES  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments Widebus™  
Family  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE  
1Q1  
1Q2  
GND  
1Q3  
1Q4  
1LE  
1D1  
1D2  
GND  
1D3  
1D4  
Operates From 1.65 V to 3.6 V  
Max tpd of 3.6 ns at 3.3 V  
2
3
±24-mA Output Drive at 3.3 V  
4
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
5
6
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
7
V
CC  
V
CC  
8
1Q5  
1Q6  
GND  
1Q7  
1Q8  
2Q1  
2Q2  
GND  
2Q3  
2Q4  
1D5  
1D6  
GND  
1D7  
1D8  
2D1  
2D2  
GND  
2D3  
2D4  
9
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
XXXX  
DESCRIPTION/ORDERING INFORMATION  
This 16-bit transparent D-type latch is designed for  
1.65-V to 3.6-V VCC operation.  
V
CC  
V
CC  
The SN74ALVCH16373 is particularly suitable for  
implementing buffer registers, I/O ports, bidirectional  
bus drivers, and working registers. This device can  
be used as two 8-bit latches or one 16-bit latch.  
When the latch-enable (LE) input is high, the Q  
outputs follow the data (D) inputs. When LE is taken  
low, the Q outputs are latched at the levels set up at  
the D inputs.  
2Q5  
2Q6  
GND  
2Q7  
2Q8  
2OE  
2D5  
2D6  
GND  
2D7  
2D8  
2LE  
A buffered output-enable (OE) input can be used to  
place the eight outputs in either a normal logic state  
(high or low logic levels) or the high-impedance state.  
In the high-impedance state, the outputs neither  
load nor drive the buslines significantly. The  
high-impedance state and the increased drive provide  
the capability to drive bus lines without need for  
interface or pullup components. OE does not affect  
internal operations of the latch. Old data can be  
retained or new data can be entered while the  
outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors  
with the bus-hold circuitry is not recommended.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1995–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

与SN74ALVCH16373GRDR相关器件

型号 品牌 获取价格 描述 数据表
SN74ALVCH16373KR TI

获取价格

16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
SN74ALVCH16373ZRDR TI

获取价格

16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
SN74ALVCH16374 TI

获取价格

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16374DGG TI

获取价格

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16374DGGR TI

获取价格

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16374DGVR TI

获取价格

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16374DL TI

获取价格

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16374DLR TI

获取价格

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16374KR TI

获取价格

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16409 TI

获取价格

9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER WITH 3-STATE OUTPUTS