5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 总线驱动器/收发器> SN74ALVCH16373DL
SN74ALVCH16373DL PDF预览

SN74ALVCH16373DL

更新时间： 2024-09-15 23:09:43
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器锁存器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
9页 126K
描述
16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

SN74ALVCH16373DL 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SSOP
包装说明：SSOP, SSOP48,.4针数：48
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：0.96控制类型：ENABLE LOW/HIGH
计数方向：UNIDIRECTIONAL系列：ALVC/VCX/A
JESD-30 代码：R-PDSO-G48JESD-609代码：e4
长度：15.875 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.024 A
湿度敏感等级：1位数：8
功能数量：2端口数量：2
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP48,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
包装方法：TUBE峰值回流温度（摄氏度）：260
电源：3.3 V最大电源电流（ICC）：0.04 mA
Prop。Delay @ Nom-Sup：3.6 ns传播延迟（tpd）：4.9 ns
认证状态：Not Qualified座面最大高度：2.79 mm
子类别：FF/Latches最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.65 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.635 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A宽度：7.49 mm
Base Number Matches：1

SN74ALVCH16373DL 数据手册

 浏览型号SN74ALVCH16373DL的Datasheet PDF文件第2页浏览型号SN74ALVCH16373DL的Datasheet PDF文件第3页浏览型号SN74ALVCH16373DL的Datasheet PDF文件第4页浏览型号SN74ALVCH16373DL的Datasheet PDF文件第5页浏览型号SN74ALVCH16373DL的Datasheet PDF文件第6页浏览型号SN74ALVCH16373DL的Datasheet PDF文件第7页 
SN74ALVCH16373  
16-BIT TRANSPARENT D-TYPE LATCH  
WITH 3-STATE OUTPUTS  
SCES020C – JULY 1995 – REVISED FEBRUARY 1999  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1OE  
1Q1  
1Q2  
GND  
1Q3  
1Q4  
1LE  
1D1  
1D2  
GND  
1D3  
1D4  
1
2
3
4
5
6
7
8
9
48  
47  
46  
45  
44  
43  
42  
41  
40  
ESD Protection Exceeds 2000 V Per  
MIL-STD-833, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
V
V
CC  
CC  
1Q5  
1Q6  
1D5  
1D6  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
GND 10  
39 GND  
1Q7  
1Q8  
1D7  
1D8  
11  
12  
38  
37  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
2Q1 13  
2Q2 14  
GND 15  
2Q3 16  
2Q4 17  
36 2D1  
35 2D2  
34 GND  
33 2D3  
32 2D4  
description  
This 16-bit transparent D-type latch is designed  
for 1.65-V to 3.6-V V operation.  
CC  
V
18  
31  
V
CC  
CC  
2Q5 19  
2Q6 20  
GND 21  
2Q7 22  
2Q8 23  
2OE 24  
30 2D5  
29 2D6  
28 GND  
27 2D7  
26 2D8  
25 2LE  
The SN74ALVCH16373 is particularly suitable for  
implementing buffer registers, I/O ports,  
bidirectional bus drivers, and working registers.  
This device can be used as two 8-bit latches or  
one 16-bit latch. When the latch-enable (LE) input  
is high, the Q outputs follow the data (D) inputs.  
When LE is taken low, the Q outputs are latched  
at the levels set up at the D inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive  
the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus  
lines without need for interface or pullup components. OE does not affect internal operations of the latch. Old  
data can be retained or new data can be entered while the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVCH16373 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

中文翻译

下载PDF

SN74ALVCH16373DL 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALVCH16373DLR TI

类似代替

 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
74ALVCH16373DLRG4 TI

类似代替

 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
74ALVCH16373DLG4 TI

类似代替

 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

与SN74ALVCH16373DL相关器件

型号 品牌 获取价格 描述 数据表
SN74ALVCH16373DLR TI

获取价格

 		16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
SN74ALVCH16373GRDR TI

获取价格

 		16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
SN74ALVCH16373KR TI

获取价格

 		16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
SN74ALVCH16373ZRDR TI

获取价格

 		16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
SN74ALVCH16374 TI

获取价格

 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16374DGG TI

获取价格

 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16374DGGR TI

获取价格

 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16374DGVR TI

获取价格

 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16374DL TI

获取价格

 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH16374DLR TI

获取价格

 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

与SN74ALVCH16373DL相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证