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SN74ALVCH16344DGG

更新时间： 2024-11-17 22:34:43
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件双倍数据速率
页数 文件大小 规格书
8页 118K
描述
1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS

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SN74ALVCH16344DGG 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：TSSOP, TSSOP56,.3,20Reach Compliance Code：not_compliant
风险等级：5.88JESD-30 代码：R-PDSO-G56
逻辑集成电路类型：BUS DRIVER端子数量：56
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP56,.3,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH电源：3.3 V
认证状态：Not Qualified子类别：Other Logic ICs
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUALBase Number Matches：1

SN74ALVCH16344DGG 数据手册

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SN74ALVCH16344  
1-BIT TO 4-BIT ADDRESS DRIVER  
WITH 3-STATE OUTPUTS  
SCES054F – SEPTEMBER 1995 – REVISED FEBRUARY 1999  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
OE1  
1B1  
1B2  
GND  
1B3  
1B4  
OE4  
8B1  
8B2  
GND  
8B3  
8B4  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
2
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
3
4
5
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
6
V
V
7
CC  
CC  
1A  
2B1  
2B2  
GND  
2B3  
2B4  
2A  
8A  
8
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL), Thin Shrink  
Small-Outline (DGG), and Thin Very  
Small-Outline (DGV) Packages  
7B1  
7B2  
GND  
7B3  
7B4  
7A  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
description  
This 1-bit to 4-bit address driver is designed for  
1.65-V to 3.6-V V operation.  
3A  
6A  
CC  
3B1  
3B2  
GND  
3B3  
3B4  
4A  
6B1  
6B2  
GND  
6B3  
6B4  
5A  
The SN74ALVCH16344 is used in applications in  
which four separate memory locations must be  
addressed by a single address.  
To ensure the high-impedance state during power  
up or power down, OE should be tied to V  
CC  
V
V
CC  
CC  
through a pullup resistor; the minimum value of  
the resistor is determined by the current-sinking  
capability of the driver.  
4B1  
4B2  
GND  
4B3  
4B4  
OE2  
5B1  
5B2  
GND  
5B3  
5B4  
OE3  
Active bus-hold circuitry is provided to hold  
unused or floating inputs at a valid logic level.  
The SN74ALVCH16344 is characterized for  
operation from –40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Bn  
OE  
A
H
L
L
L
H
L
H
H
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345678

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