5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 总线驱动器/收发器> SN74ALVCH16334DGGR
SN74ALVCH16334DGGR PDF预览

SN74ALVCH16334DGGR

更新时间： 2024-11-06 13:13:47
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器输出元件
页数 文件大小 规格书
10页 136K
描述
ALVC/VCX/A SERIES, 16-BIT DRIVER, TRUE OUTPUT, PDSO48, GREEN, PLASTIC, TSSOP-48

阅读下载

中文翻译

获取价格

SN74ALVCH16334DGGR 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP, TSSOP48,.3,20
针数：48Reach Compliance Code：compliant
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：7.41控制类型：ENABLE LOW
系列：ALVC/VCX/AJESD-30 代码：R-PDSO-G48
长度：12.5 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.024 A
位数：16功能数量：1
端口数量：2端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP48,.3,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3.3 V
Prop。Delay @ Nom-Sup：3.3 ns传播延迟（tpd）：4.5 ns
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.65 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：6.1 mm
Base Number Matches：1

SN74ALVCH16334DGGR 数据手册

 浏览型号SN74ALVCH16334DGGR的Datasheet PDF文件第2页浏览型号SN74ALVCH16334DGGR的Datasheet PDF文件第3页浏览型号SN74ALVCH16334DGGR的Datasheet PDF文件第4页浏览型号SN74ALVCH16334DGGR的Datasheet PDF文件第5页浏览型号SN74ALVCH16334DGGR的Datasheet PDF文件第6页浏览型号SN74ALVCH16334DGGR的Datasheet PDF文件第7页 
SN74ALVCH16334  
16-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
SCES090H – OCTOBER 1996 – REVISED FEBRUARY 1999  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
OE  
Y1  
Y2  
GND  
Y3  
Y4  
CLK  
A1  
A2  
GND  
A3  
A4  
2
Designed to Comply With JEDEC 168-Pin  
and 200-Pin SDRAM Buffered DIMM  
Specification  
3
4
5
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
6
7
V
V
CC  
Y5  
CC  
8
A5  
A6  
GND  
A7  
A8  
9
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Y6  
GND  
Y7  
Y8  
Y9  
Y10  
GND  
Y11  
Y12  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
A9  
A10  
GND  
A11  
A12  
Package Options Include Plastic Shrink  
Small-Outline (DL), Thin Shrink  
Small-Outline (DGG), and Thin Very  
Small-Outline (DGV) Packages  
V
V
CC  
CC  
Y13  
Y14  
GND  
Y15  
Y16  
NC  
A13  
A14  
GND  
A15  
A16  
LE  
description  
This 16-bit universal bus driver is designed for  
1.65-V to 3.6-V V operation.  
CC  
Data flow from A to Y is controlled by the  
output-enable (OE) input. The device operates in  
the transparent mode when the latch-enable (LE)  
input is low. When LE is high, the A data is latched  
if the clock (CLK) input is held at a high or low logic  
level. If LE is high, the A data is stored in the  
latch/flip-flop on the low-to-high transition of CLK.  
When OE is high, the outputs are in the  
high-impedance state.  
NC – No internal connection  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVCH16334 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...10

中文翻译

下载PDF

SN74ALVCH16334DGGR 替代型号

型号 品牌 替代类型 描述 数据表
74ALVC16334DGGRE4 TI

功能相似

 16-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

与SN74ALVCH16334DGGR相关器件

型号 品牌 获取价格 描述 数据表
SN74ALVCH16334DGV TI

获取价格

 		16-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16334DGVR TI

获取价格

 		ALVC/VCX/A SERIES, 16-BIT DRIVER, TRUE OUTPUT, PDSO48, GREEN, PLASTIC, TVSOP-48
SN74ALVCH16334DL TI

获取价格

 		16-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16334DLR TI

获取价格

 		ALVC/VCX/A SERIES, 16-BIT DRIVER, TRUE OUTPUT, PDSO48, GREEN, PLASTIC, SSOP-48
SN74ALVCH16344 TI

获取价格

 		1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16344_07 TI

获取价格

 		1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16344DGG TI

获取价格

 		1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16344DGGR TI

获取价格

 		1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16344DGV TI

获取价格

 		1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16344DL TI

获取价格

 		1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS

与SN74ALVCH16334DGGR相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证