SN74ALVCH16245-EP
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES608A–SEPTEMBER 2004–REVISED JUNE 2006
FEATURES
•
Controlled Baseline
DL PACKAGE
(TOP VIEW)
– One Assembly/Test Site, One Fabrication
Site
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
•
Enhanced Diminishing Manufacturing
Sources (DMS) Support
1DIR
1B1
1B2
GND
1B3
1B4
1OE
1A1
1A2
GND
1A3
1A4
2
3
•
•
•
Enhanced Product-Change Notification
4
(1)
Qualification Pedigree
5
Member of the Texas Instruments Widebus™
Family
6
7
V
CC
V
CC
•
•
•
•
Operates From 1.65 V to 3.6 V
Max tpd of 3 ns at 3.3 V
8
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
±24-mA Output Drive at 3.3 V
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
•
•
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
V
CC
V
CC
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
2B5
2B6
GND
2B7
2B8
2DIR
2A5
2A6
GND
2A7
2A8
2OE
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
DESCRIPTION/ORDERING INFORMATION
This 16-bit (dual-octal) noninverting bus transceiver is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16245-EP is designed for asynchronous communication between data buses. The
control-function implementation minimizes external timing requirements.
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the
A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)
input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.
ORDERING INFORMATION
TA
–40°C to 85°C
–55°C to 125°C
PACKAGE(1)
Tape and reel
Tape and reel
ORDERABLE PART NUMBER
CALVCH16245IDLREP
TOP-SIDE MARKING
ALVCH16245
SSOP – DL
SSOP – DL
CALVCH16245MDLREP
ALCH16245M
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.