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SN74ALVCH162344

更新时间： 2024-11-17 23:09:43
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德州仪器 - TI 驱动器输出元件双倍数据速率
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8页 121K
描述
1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS

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SN74ALVCH162344 数据手册

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SN74ALVCH162344  
1-BIT TO 4-BIT ADDRESS DRIVER  
WITH 3-STATE OUTPUTS  
SCES085F – AUGUST 1996 – REVISED JUNE 1999  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
OE1  
1B1  
1B2  
GND  
1B3  
1B4  
OE4  
8B1  
8B2  
GND  
8B3  
8B4  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
2
Output Ports Have Equivalent 26-Ω Series  
Resistors, So No External Resistors Are  
Required  
3
4
5
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
6
V
V
7
CC  
CC  
1A  
2B1  
2B2  
GND  
2B3  
2B4  
2A  
8A  
8
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
7B1  
7B2  
GND  
7B3  
7B4  
7A  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DGG), Thin Shrink  
Small-Outline (DL), and Thin Very  
Small-Outline (DGV) Packages  
NOTE: For tape and reel order entry:  
3A  
6A  
The DGGR package is abbreviated to GR, and  
the DGVR package is abbreviated to VR.  
3B1  
3B2  
GND  
3B3  
3B4  
4A  
6B1  
6B2  
GND  
6B3  
6B4  
5A  
description  
This 1-bit to 4-bit address driver is designed for  
1.65-V to 3.6-V V  
operation.  
CC  
V
V
CC  
CC  
The SN74ALVCH162344 is used in applications  
in which four separate memory locations must be  
addressed by a single address.  
4B1  
4B2  
GND  
5B1  
5B2  
GND  
The outputs, which are designed to sink up to  
12 mA, include equivalent 26-Ω resistors to  
reduce overshoot and undershoot.  
4B3 26  
31 5B3  
4B4  
5B4  
27  
28  
30  
29  
OE2  
OE3  
To ensure the high-impedance state during power  
up or power down, the output enable (OE) inputs  
shouldbetiedtoV throughapullupresistor;the  
CC  
minimumvalueoftheresistorisdeterminedbythe  
current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVCH162344 is characterized for operation from –40°C to 85°C.  
A-TO-B FUNCTION TABLE  
INPUTS  
OUTPUT  
Bn  
OE  
A
H
L
L
L
H
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345678

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SN74ALVCH162344DGV TI

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SN74ALVCH162344DGVR TI

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SN74ALVCH162344DL TI

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SN74ALVCH162344DLR TI

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 		ALVC/VCX/A SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, SSOP-56
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 		具有总线保持和三态输出的 8 通道、1.65V 至 3.6V 缓冲器 | DGG | 56
SN74ALVCH162344VR TI

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SN74ALVCH162373 TI

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 		16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
SN74ALVCH162373DL TI

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 		16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

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