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SN74ALVCH162334VR PDF预览

SN74ALVCH162334VR

更新时间： 2024-11-19 11:08:03
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管逻辑集成电路总线驱动器总线收发器
页数 文件大小 规格书
10页 137K
描述
具有三态输出的 16 位通用总线驱动器 | DGV | 48 | -40 to 85

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SN74ALVCH162334VR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：TSSOP, TSSOP48,.25,16针数：48
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.63控制类型：ENABLE LOW
计数方向：UNIDIRECTIONAL系列：ALVC/VCX/A
JESD-30 代码：R-PDSO-G48JESD-609代码：e4
长度：9.7 mm逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.012 A湿度敏感等级：1
位数：16功能数量：1
端口数量：2端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE WITH SERIES RESISTOR输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP48,.25,16封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法：TR
峰值回流温度（摄氏度）：260电源：3.3 V
最大电源电流（ICC）：0.04 mAProp。Delay @ Nom-Sup：3.9 ns
传播延迟（tpd）：5.4 ns认证状态：Not Qualified
座面最大高度：1.2 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.4 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED翻译：N/A
宽度：4.4 mm

SN74ALVCH162334VR 数据手册

 浏览型号SN74ALVCH162334VR的Datasheet PDF文件第2页浏览型号SN74ALVCH162334VR的Datasheet PDF文件第3页浏览型号SN74ALVCH162334VR的Datasheet PDF文件第4页浏览型号SN74ALVCH162334VR的Datasheet PDF文件第5页浏览型号SN74ALVCH162334VR的Datasheet PDF文件第6页浏览型号SN74ALVCH162334VR的Datasheet PDF文件第7页 
SN74ALVCH162334  
16-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
SCES120F – JULY 1997 – REVISED JUNE 1999  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
OE  
Y1  
Y2  
GND  
Y3  
Y4  
CLK  
A1  
A2  
GND  
A3  
A4  
2
Output Port Has Equivalent 26-Ω Series  
Resistors, So No External Resistors Are  
Required  
3
4
5
Designed to Comply With JEDEC 168-Pin  
and 200-Pin SDRAM Buffered DIMM  
Specification  
6
7
V
V
CC  
Y5  
CC  
8
A5  
A6  
GND  
A7  
A8  
9
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Y6  
GND  
Y7  
Y8  
Y9  
Y10  
GND  
Y11  
Y12  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
A9  
A10  
GND  
A11  
A12  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
Package Options Include Plastic Shrink  
Small-Outline (DL), Thin Shrink  
Small-Outline (DGG), and Thin Very  
V
V
CC  
CC  
Y13  
Y14  
GND  
Y15  
Y16  
NC  
A13  
A14  
GND  
A15  
A16  
LE  
Small-Outline (DGV) Packages  
NOTE: For tape and reel order entry:  
The DGGR package is abbreviated to GR, and  
the DGVR package is abbreviated to VR.  
description  
NC – No internal connection  
This 16-bit universal bus driver is designed for  
1.65-V to 3.6-V V  
operation.  
CC  
Data flow from A to Y is controlled by the  
output-enable (OE) input. The device operates in  
the transparent mode when the latch-enable (LE)  
input is low. When LE is high, the A data is latched if the clock (CLK) input is held at a high or low logic level.  
If LE is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is high, the  
outputs are in the high-impedance state.  
The output port includes equivalent 26-Ω series resistors to reduce overshoot and undershoot.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVCH162334 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...10

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SN74ALVCH162344 TI

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 		1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH162344DGG TI

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 		1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH162344DGGR TI

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 		1-Bit To 4-Bit Address Driver With 3-State Outputs 56-TSSOP -40 to 85
SN74ALVCH162344DGV TI

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 		1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH162344DGVR TI

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 		ALVC/VCX/A SERIES, QUAD 2-BIT DRIVER, TRUE OUTPUT, PDSO56, TVSOP-56
SN74ALVCH162344DL TI

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 		1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH162344DLR TI

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 		ALVC/VCX/A SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, SSOP-56
SN74ALVCH162344GR TI

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 		具有总线保持和三态输出的 8 通道、1.65V 至 3.6V 缓冲器 | DGG | 56
SN74ALVCH162344VR TI

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 		1-Bit To 4-Bit Address Driver With 3-State Outputs 56-TVSOP -40 to 85
SN74ALVCH162373 TI

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 		16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

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