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SN74ALVC16334DLG4 PDF预览

SN74ALVC16334DLG4

更新时间： 2024-11-09 05:24:55
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德州仪器 - TI 总线驱动器输出元件
页数 文件大小 规格书
13页 217K
描述
16-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

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SN74ALVC16334DLG4 数据手册

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SN74ALVC16334  
16-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES128E–FEBRUARY 1998–REVISED SEPTEMBER 2004  
FEATURES  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
•
Member of the Texas Instruments Widebus™  
Family  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
OE  
Y1  
CLK  
A1  
•
•
•
•
•
Operates From 1.65 V to 3.6 V  
Max tpd of 3.2 ns at 3.3 V  
2
3
Y2  
GND  
Y3  
A2  
GND  
A3  
±24-mA Output Drive at 3.3 V  
Ideal for Use in PC100 Register DIMM  
4
5
Designed to Comply With JEDEC 168-Pin and  
200-Pin SDRAM Buffered DIMM Specification  
6
Y4  
A4  
7
V
CC  
V
CC  
8
•
•
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Y5  
Y6  
GND  
Y7  
Y8  
Y9  
A5  
A6  
GND  
A7  
A8  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
A9  
– 1000-V Charged-Device Model (C101)  
Y10  
GND  
Y11  
Y12  
A10  
GND  
A11  
A12  
DESCRIPTION/ORDERING INFORMATION  
This 16-bit universal bus driver is designed for 1.65-V  
to 3.6-V VCC operation.  
V
CC  
V
CC  
Y13  
Y14  
GND  
Y15  
Y16  
NC  
A13  
A14  
GND  
A15  
A16  
LE  
Data flow from  
A to Y is controlled by the  
output-enable (OE) input. The device operates in the  
transparent mode when the latch-enable (LE) input is  
low. When LE is high, the A data is latched if the  
clock (CLK) input is held at a high or low logic level. If  
LE is high, the A data is stored in the latch/flip-flop on  
the low-to-high transition of CLK. When OE is high,  
the outputs are in the high-impedance state.  
NC − No internal connection  
To ensure the high-impedance state during power up  
or power down, OE should be tied to VCC through a  
pullup resistor; the minimum value of the resistor is  
determined by the current-sinking capability of the  
driver.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING  
Tube  
SN74ALVC16334DL  
SSOP - DL  
ALVC16334  
Tape and reel  
Tape and reel  
Tape and reel  
SN74ALVC16334DLR  
SN74ALVC16334DGGR  
SN74ALVC16334DGVR  
-40°C to 85°C  
TSSOP - DGG  
TVSOP - DGV  
ALVC16334  
VC334  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1998–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...13

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SN74ALVC16334DLG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALVCH16334DL TI

类似代替

 16-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVC16334DL TI

类似代替

 SN74ALVC162836

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