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SN74ALVC125DGV PDF预览

SN74ALVC125DGV

更新时间: 2024-11-17 23:03:11
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路电视光电二极管输出元件
页数 文件大小 规格书
8页 124K
描述
QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

SN74ALVC125DGV 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:PLASTIC, TVSOP-14针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.51Is Samacsys:N
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G14
长度:4.4 mm逻辑集成电路类型:BUS DRIVER
位数:1功能数量:4
端口数量:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25,16封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟(tpd):5.3 ns
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.4 mm
端子位置:DUAL宽度:3.6 mm
Base Number Matches:1

SN74ALVC125DGV 数据手册

 浏览型号SN74ALVC125DGV的Datasheet PDF文件第2页浏览型号SN74ALVC125DGV的Datasheet PDF文件第3页浏览型号SN74ALVC125DGV的Datasheet PDF文件第4页浏览型号SN74ALVC125DGV的Datasheet PDF文件第5页浏览型号SN74ALVC125DGV的Datasheet PDF文件第6页浏览型号SN74ALVC125DGV的Datasheet PDF文件第7页 
SN74ALVC125  
QUADRUPLE BUS BUFFER GATE  
WITH 3-STATE OUTPUTS  
SCES110D – JULY 1997 – REVISED DECEMBER 1998  
D, DGV, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
1OE  
1A  
1Y  
2OE  
2A  
2Y  
V
CC  
4OE  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
4A  
4Y  
3OE  
3A  
3Y  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Package Options Include Plastic  
Small-Outline (D), Thin Very Small-Outline  
(DGV), and Thin Shrink Small-Outline (PW)  
Packages  
GND  
8
description  
This quadruple bus buffer gate is designed for 1.65-V to 3.6-V V  
operation.  
CC  
The SN74ALVC125 features independent line drivers with 3-state outputs. Each output is disabled when the  
associated output-enable (OE) input is high.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN74ALVC125 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each buffer)  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
L
L
H
L
H
X
Z
logic symbol  
1
2
1
EN  
1OE  
1A  
3
6
1Y  
2Y  
4
5
2OE  
2A  
10  
9
3OE  
3A  
8
3Y  
4Y  
13  
12  
11  
4OE  
4A  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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