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SN74ALVC00RGYR PDF预览

SN74ALVC00RGYR

更新时间: 2024-11-19 05:24:55
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路输入元件
页数 文件大小 规格书
16页 726K
描述
QUADRUPLE 2-INPUT POSITIVE-NAND GATE

SN74ALVC00RGYR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFN
包装说明:HVQCCN, LCC14/18,.14SQ,20针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.57
系列:ALVC/VCX/AJESD-30 代码:S-PQCC-N14
JESD-609代码:e4长度:3.5 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.024 A湿度敏感等级:2
功能数量:4输入次数:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装等效代码:LCC14/18,.14SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:3 ns
传播延迟(tpd):4.4 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1 mm
子类别:Gates最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.5 mmBase Number Matches:1

SN74ALVC00RGYR 数据手册

 浏览型号SN74ALVC00RGYR的Datasheet PDF文件第2页浏览型号SN74ALVC00RGYR的Datasheet PDF文件第3页浏览型号SN74ALVC00RGYR的Datasheet PDF文件第4页浏览型号SN74ALVC00RGYR的Datasheet PDF文件第5页浏览型号SN74ALVC00RGYR的Datasheet PDF文件第6页浏览型号SN74ALVC00RGYR的Datasheet PDF文件第7页 
SN74ALVC00  
QUADRUPLE 2-INPUT POSITIVE-NAND GATE  
www.ti.com  
SCES115GJULY 1997REVISED AUGUST 2004  
FEATURES  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
Operates From 1.65 V to 3.6 V  
Max tpd of 3 ns at 3.3 V  
±24-mA Output Drive at 3.3 V  
– 1000-V Charged-Device Model (C101)  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
D, DGV, NS, OR PW PACKAGE  
(TOP VIEW)  
RGY PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1A  
1B  
V
CC  
4B  
4A  
4Y  
3B  
3A  
3Y  
1
14  
1Y  
2A  
2B  
2Y  
1B  
1Y  
2A  
2B  
2Y  
13 4B  
2
3
4
5
6
12  
11  
10  
9
4A  
4Y  
3B  
3A  
8
GND  
7
8
DESCRIPTION/ORDERING INFORMATION  
This quadruple 2-input positive-NAND gate is designed for 1.65-V to 3.6-V VCC operation.  
The SN74ALVC00 performs the Boolean function Y = A · B or Y = A + B in positive logic.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74ALVC00RGYR  
SN74ALVC00D  
TOP-SIDE MARKING  
QFN - RGY  
SOIC - D  
Tape and reel  
VA00  
Tube  
ALVC00  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
SN74ALVC00DR  
-40°C to 85°C  
SOP - NS  
SN74ALVC00NSR  
ALVC00  
VA00  
TSSOP - PW  
TVSOP - DGV  
SN74ALVC00PWR  
SN74ALVC00DGVR  
VA00  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
A
H
L
B
H
X
L
L
H
H
X
LOGIC DIAGRAM, EACH GATE (POSITIVE LOGIC)  
A
Y
B
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1997–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

SN74ALVC00RGYR 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALVC00RGYRG4 TI

类似代替

QUADRUPLE 2-INPUT POSITIVE-NAND GATE
74ALVC00BQ,115 NXP

功能相似

74ALVC00 - Quad 2-input NAND gate QFN 14-Pin

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