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SN74ALS841NT PDF预览

SN74ALS841NT

更新时间: 2024-11-08 23:06:15
品牌 Logo 应用领域
德州仪器 - TI 锁存器输出元件
页数 文件大小 规格书
9页 133K
描述
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS

SN74ALS841NT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP24,.3针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.69其他特性:POWER OFF DISABLE OUTPUTS TO PERMIT LIVE INSERTION
系列:ALSJESD-30 代码:R-PDIP-T24
JESD-609代码:e4长度:31.64 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A位数:10
功能数量:1端口数量:2
端子数量:24最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP24,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
最大电源电流(ICC):62 mA传播延迟(tpd):9 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Bus Driver/Transceiver最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

SN74ALS841NT 数据手册

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SN74ALS841, SN74AS841A, SN74ALS842  
10-BIT BUS-INTERFACE D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995  
SN74ALS841, SN74AS841A . . . DW OR NT PACKAGE  
(TOP VIEW)  
3-State Buffer-Type Outputs Drive Bus  
Lines Directly  
Bus-Structured Pinout  
Provide Extra Bus-Driving Latches  
Necessary for Wider Address/Data Paths or  
Buses With Parity  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1
2
3
4
5
6
7
8
9
24  
23 1Q  
22 2Q  
21 3Q  
20 4Q  
19 5Q  
18 6Q  
17 7Q  
16 8Q  
15 9Q  
14 10Q  
13 LE  
Buffered Control Inputs to Reduce  
dc Loading Effects  
Power-Up High-Impedance State  
Package Options Include Plastic  
Small-Outline (DW) Packages and Standard  
Plastic (NT) 300-mil DIPs  
9D 10  
10D 11  
GND 12  
description  
These 10-bit latches feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. They are  
particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
SN74ALS842 . . . DW OR NT PACKAGE  
(TOP VIEW)  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
1
2
3
4
5
6
7
8
9
24  
V
CC  
23 1Q  
22 2Q  
21 3Q  
20 4Q  
19 5Q  
18 6Q  
17 7Q  
16 8Q  
15 9Q  
14 10Q  
13 LE  
The ten latches are transparent D-type latches.  
The SN74ALS841 and SN74AS841A have  
noninverting data (D) inputs. The SN74ALS842  
has inverting D inputs.  
Abufferedoutput-enable(OE)inputplacestheten  
outputs in either a normal logic state (high or low  
logic levels) or a high-impedance state. In the  
high-impedance state, the outputs neither load  
nor drive the bus lines significantly. The  
high-impedancestateandincreaseddriveprovide  
the capability to drive bus lines without interface or  
pullup components.  
9D 10  
10D 11  
GND 12  
OE does not affect the internal operation of the latches. Previously stored data can be retained or new data can  
be entered while the outputs are off.  
The SN74ALS841, SN74AS841A, and SN74ALS842 are characterized for operation from 0°C to 70°C.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74ALS841NT 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALS841DWRG4 TI

完全替代

ALS SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24, PLASTIC, DSO-24

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