SN74ALS667

更新时间： 2024-10-31 23:06:15

品牌	Logo	应用领域
德州仪器 - TI		锁存器输出元件
页数	文件大小	规格书
8页	127K
描述
8-BIT D-TYPE TRANSPARENT READ-BACK LATCHES WITH 3-STATE OUTPUTS

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SN74ALS667 数据手册

SN74ALS666, SN74ALS667

8-BIT D-TYPE TRANSPARENT READ-BACK LATCHES

WITH 3-STATE OUTPUTS

SDAS227A – JUNE 1984 – REVISED JANUARY 1995

SN74ALS666 . . . DW OR NT PACKAGE

(TOP VIEW)

• 3-State I/O-Type Read-Back Inputs

• Bus-Structured Pinout

• Choice of True or Inverting Logic

– SN74ALS666 . . . True Outputs

– SN74ALS667 . . . Inverted Outputs

OERB

OE1

OE2

• Preset and Clear Inputs

• Package Options Include Plastic

Small-Outline (DW) Packages and Standard

Plastic (NT) 300-mil DIPs

description

These 8-bit D-type transparent latches are

designed specifically for storing the contents of

the input data bus, plus reading back the stored

data onto the input data bus. In addition, they

provide a 3-state buffer-type output and are easily

utilized in bus-structured applications.

CLR

PRE

GND 12

13 LE

SN74ALS667 . . . DW OR NT PACKAGE

(TOP VIEW)

While the latch enable (LE) is high, the Q outputs

oftheSN74ALS666followthedata(D)inputs. The

Q outputs of the SN74ALS667 provide the inverse

of the data applied to its D inputs. The Q or

Q output of both devices is in the high-impedance

state if either output-enable (OE1 or OE2) input is

at a high logic level.

OERB

OE1

OE2

Read back is provided through the read-back

control (OERB) input. When OERB is taken low,

the data present at the output of the data latches

passes back onto the input data bus. When OERB

is taken high, the output of the data latches is

isolated from the D inputs. OERB does not affect

the internal operation of the latches; however,

caution should be exercised to avoid a bus

conflict.

CLR

PRE

GND 12

13 LE

The SN74ALS666 and SN74ALS667 are

characterized for operation from 0°C to 70°C.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7 8

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与SN74ALS667相关器件

型号	品牌	获取价格	描述	数据表
SN74ALS667DW	TI	获取价格	8-BIT D-TYPE TRANSPARENT READ-BACK LATCHES WITH 3-STATE OUTPUTS
SN74ALS667DW3	TI	获取价格	IC IC,LATCH,SINGLE,8-BIT,ALS-TTL,SOP,24PIN,PLASTIC, FF/Latch
SN74ALS667DWE4	TI	获取价格	ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO24, GREEN, PLASTIC, SOIC-24
SN74ALS667DWG4	TI	获取价格	ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO24, GREEN, PLASTIC, SOIC-24
SN74ALS667DWP3	TI	获取价格	IC IC,LATCH,SINGLE,8-BIT,ALS-TTL,SOP,24PIN,PLASTIC, FF/Latch
SN74ALS667DWR	TI	获取价格	ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO24, GREEN, PLASTIC, SOIC-24
SN74ALS667DWRE4	TI	获取价格	ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO24, GREEN, PLASTIC, SOIC-24
SN74ALS667DWRG4	TI	获取价格	ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO24, GREEN, PLASTIC, SOIC-24
SN74ALS667FN	TI	获取价格	暂无描述
SN74ALS667FN3	TI	获取价格	ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PQCC28

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