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SN74ALS648NT

更新时间: 2024-11-25 13:13:47
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德州仪器 - TI 总线收发器输出元件
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SN74ALS648NT 数据手册

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SN54ALS646, SN54ALS648, SN54AS646  
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648  
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS  
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995  
SN54ALS646, SN54ALS648, SN54AS646 . . . JT PACKAGE  
Independent Registers for A and B Buses  
Multiplexed Real-Time and Stored Data  
Choice of True or Inverting Data Paths  
SN74ALS646A, SN74ALS648A, SN74AS646,  
SN74AS648 . . . DW OR NT PACKAGE  
(TOP VIEW)  
Choice of 3-State or Open-Collector  
CLKAB  
SAB  
DIR  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
GND  
V
CC  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
Outputs  
CLKBA  
SBA  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
2
Package Options Include Plastic  
Small-Outline (DW) Packages, Ceramic  
Chip Carriers (FK), and Standard Plastic  
(NT) and Ceramic (JT) 300-mil DIPs  
3
4
5
6
7
DEVICE  
OUTPUT  
3 state  
LOGIC  
True  
8
SN54ALS646, SN74ALS646A, AS646  
SN54ALS648, SN74ALS648A, SN74AS648  
9
3 state  
Inverting  
10  
11  
12  
description  
B8  
These devices consist of bus-transceiver circuits  
with 3-state or open-collector outputs, D-type  
flip-flops, and control circuitry arranged for  
multiplexed transmission of data directly from the  
data bus or from the internal storage registers.  
Data on the A or B bus is clocked into the registers  
on the low-to-high transition of the appropriate  
clock (CLKAB or CLKBA) input. Figure 1  
illustrates the four fundamental bus-management  
functions that can be performed with the octal bus  
transceivers and registers.  
SN54ALS646, SN54ALS648, SN54AS646 . . . FK PACKAGE  
(TOP VIEW)  
4
3
2
1
28 27 26  
25  
OE  
B1  
B2  
NC  
A1  
A2  
A3  
NC  
A4  
A5  
A6  
5
24  
23  
22  
6
7
8
21 B3  
20 B4  
9
Output-enable (OE) and direction-control (DIR)  
inputs control the transceiver functions. In the  
transceiver mode, data present at the high-  
impedance port may be stored in either or both  
registers.  
10  
11  
19  
B5  
12 13 14 15 16 17 18  
The select-control (SAB and SBA) inputs can  
multiplex stored and real-time (transparent mode)  
NC – No internal connection  
data. Thecircuitryusedforselectcontroleliminatesthetypicaldecodingglitchthatoccursinamultiplexerduring  
the transition between stored and real-time data. DIR determines which bus receives data when OE is low. In  
the isolation mode (OE high), A data may be stored in one register and/or B data may be stored in the other  
register.  
When an output function is disabled, the input function is still enabled and can be used to store and transmit  
data. Only one of the two buses, A or B, may be driven at a time.  
The -1 version of the SN74ALS646A is identical to the standard version, except that the recommended  
maximum I  
SN54ALS648, or SN74ALS648A.  
in the -1 version is increased to 48 mA. There are no -1 versions of the SN54ALS646,  
OL  
The SN54ALS646, SN54ALS648, and SN54AS646 are characterized for operation over the full military  
temperature range of 55°C to 125°C. The SN74ALS646A, SN74ALS648A, SN74AS646, and SN74AS648 are  
characterized for operation from 0°C to 70°C.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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