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SN74ALS642ADWR PDF预览

SN74ALS642ADWR

更新时间: 2024-11-25 05:17:47
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
15页 497K
描述
OCTAL BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS

SN74ALS642ADWR 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP20,.4针数:20
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.73其他特性:WITH DIRECTION CONTROL
控制类型:COMMON CONTROL计数方向:BIDIRECTIONAL
系列:ALSJESD-30 代码:R-PDSO-G20
长度:12.8 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS TRANSCEIVER最大I(ol):0.024 A
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:70 °C最低工作温度:
输出特性:OPEN-COLLECTOR输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):28 mA
Prop。Delay @ Nom-Sup:38 ns传播延迟(tpd):22 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:7.5 mmBase Number Matches:1

SN74ALS642ADWR 数据手册

 浏览型号SN74ALS642ADWR的Datasheet PDF文件第2页浏览型号SN74ALS642ADWR的Datasheet PDF文件第3页浏览型号SN74ALS642ADWR的Datasheet PDF文件第4页浏览型号SN74ALS642ADWR的Datasheet PDF文件第5页浏览型号SN74ALS642ADWR的Datasheet PDF文件第6页浏览型号SN74ALS642ADWR的Datasheet PDF文件第7页 
SN74ALS641A, SN74ALS642A, SN74AS641  
OCTAL BUS TRANSCEIVERS  
WITH OPEN-COLLECTOR OUTPUTS  
SDAS300 – MARCH 1995  
DW OR N PACKAGE  
(TOP VIEW)  
Bidirectional Bus Transceivers in  
High-Density 20-Pin Packages  
Choice of True or Inverting Logic  
Package Options Include Plastic  
Small-Outline (DW) Packages and  
Standard Plastic (N) 300-mil DIPs  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
DIR  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
V
CC  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
DEVICE  
LOGIC  
True  
SN74ALS641A, SN74AS641  
SN74ALS642A  
Inverting  
description  
GND  
These octal bus transceivers are designed for  
asynchronous two-way communication between  
data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending  
upon the level at the direction-control (DIR) input. The output-enable (OE) input disables the device so that the  
buses are effectively isolated.  
The -1 versions of the SN74ALS641A and SN74ALS642A are identical to the standard versions, except that  
the recommended maximum I is increased to 48 mA in the -1 versions.  
OL  
The SN74ALS641A, SN74ALS642A, and SN74AS641 are characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
INPUTS  
OPERATION  
SN74ALS641A  
OE  
DIR  
SN74ALS642A  
SN74AS641  
B data to A bus  
A data to B bus  
Isolation  
L
L
L
H
X
B data to A bus  
A data to B bus  
Isolation  
H
logic symbols  
SN74ALS641A, SN74AS641  
SN74ALS642A  
G3  
19  
19  
1
G3  
OE  
1
OE  
DIR  
3 EN1 [BA]  
3 EN2 [AB]  
DIR  
3 EN1 [BA]  
3 EN2 [AB]  
2
18  
2
18  
A1  
B1  
1
A1  
B1  
1
2
2
3
17  
16  
15  
14  
13  
12  
11  
3
4
5
6
7
8
9
17  
16  
15  
14  
13  
12  
11  
A2  
4
B2  
B3  
B4  
B5  
B6  
B7  
B8  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
A3  
5
A4  
6
A5  
7
A6  
8
A7  
9
A8  
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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