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SN74ALS374ADW

更新时间： 2024-02-25 07:02:56
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德州仪器 - TI 触发器输出元件
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9页 127K
描述
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

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SN74ALS374ADW 数据手册

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SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374  
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999  
SN54ALS374A, SN54AS374 . . . J PACKAGE  
SN74ALS374A, SN74AS374 . . . DW OR N PACKAGE  
(TOP VIEW)  
D-Type Flip-Flops in a Single Package With  
3-State Bus Driving True Outputs  
Full Parallel Access for Loading  
Buffered Control Inputs  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
8Q  
8D  
7D  
7Q  
6Q  
6D  
Package Options Include Plastic  
Small-Outline (DW) Packages, Ceramic  
Chip Carriers (FK), and Standard Plastic (N)  
and Ceramic (J) DIPs  
description  
13 5D  
12 5Q  
These octal D-type edge-triggered flip-flops  
feature 3-state outputs designed specifically for  
11  
GND  
CLK  
driving  
highly  
capacitive  
or  
relatively  
low-impedance loads. They are particularly  
suitable for implementing buffer registers, I/O  
ports, bidirectional bus drivers, and working  
registers.  
SN54ALS374A, SN54AS374 . . . FK PACKAGE  
(TOP VIEW)  
On the positive transition of the clock (CLK) input,  
the Q outputs are set to the logic levels set up at  
the data (D) inputs.  
3
2
1
20 19  
18  
8D  
7D  
7Q  
6Q  
6D  
2D  
2Q  
3Q  
3D  
4D  
4
5
6
7
8
17  
16  
15  
14  
A buffered output-enable (OE) input places the  
eight outputs in either a normal logic state (high or  
low logic levels) or the high-impedance state. In  
the high-impedance state, the outputs neither  
load nor drive the bus lines significantly. The  
high-impedance state and the increased drive  
provide the capability to drive bus lines without  
interface or pullup components.  
9 10 11 12 13  
OE does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
The SN54ALS374A and SN54AS374 are characterized for operation over the full military temperature range  
of –55°C to 125°C. The SN74ALS374A and SN74AS374 are characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
Q
OE  
L
CLK  
D
H
L
↑
↑
H
L
L
L
H or L  
X
X
X
Q
0
H
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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SN74ALS374ADW 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALS374ANSR TI

完全替代

 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ALS374ADWR TI

类似代替

 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ALS374AN TI

类似代替

 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

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