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SN74ALS30ADBE4 PDF预览

SN74ALS30ADBE4

更新时间: 2023-06-19 15:35:38
品牌 Logo 应用领域
德州仪器 - TI 光电二极管逻辑集成电路栅极
页数 文件大小 规格书
6页 97K
描述
单路 8 输入、---V 至 ---V 双极与非门 | DB | 14

SN74ALS30ADBE4 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.3
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.48系列:ALS
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:10.2 mm逻辑集成电路类型:NAND GATE
最大I(ol):0.008 A湿度敏感等级:1
功能数量:1输入次数:8
端子数量:14最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
最大电源电流(ICC):0.9 mAProp。Delay @ Nom-Sup:12 ns
传播延迟(tpd):10 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:2 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.3 mmBase Number Matches:1

SN74ALS30ADBE4 数据手册

 浏览型号SN74ALS30ADBE4的Datasheet PDF文件第2页浏览型号SN74ALS30ADBE4的Datasheet PDF文件第3页浏览型号SN74ALS30ADBE4的Datasheet PDF文件第4页浏览型号SN74ALS30ADBE4的Datasheet PDF文件第5页浏览型号SN74ALS30ADBE4的Datasheet PDF文件第6页 
SN54ALS30A, SN54AS30, SN74ALS30A, SN74AS30  
8-INPUT POSITIVE-NAND GATES  
SDAS010B – MARCH 1984 – REVISED DECEMBER 1994  
SN54ALS30A, SN54AS30 . . . J PACKAGE  
SN74ALS30A, SN74AS30 . . . D OR N PACKAGE  
(TOP VIEW)  
Package Options Include Plastic  
Small-Outline (D) Packages, Ceramic Chip  
Carriers (FK), and Standard Plastic (N) and  
Ceramic (J) 300-mil DIPs  
A
B
V
CC  
NC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
description  
C
H
These devices contain an 8-input positive-NAND  
gate and perform the following Boolean functions  
in positive logic:  
D
G
E
F
GND  
NC  
NC  
Y
8
Y = A B C D E F G H  
Y = A + B + C + D + E + F + G + H  
SN54ALS30A, SN54AS30 . . . FK PACKAGE  
(TOP VIEW)  
The SN54ALS30A and SN54AS30 are  
characterized for operation over the full military  
temperature range of 55°C to 125°C. The  
SN74ALS30A and SN74AS30 are characterized  
for operation from 0°C to 70°C.  
3
2
1
20 19  
18  
C
NC  
D
4
5
6
7
8
H
17  
16  
15  
14  
FUNCTION TABLE  
NC  
G
INPUTS  
A–H  
OUTPUT  
Y
NC  
E
NC  
NC  
All inputs H  
L
9 10 11 12 13  
One or more inputs L  
H
NC – No internal connection  
logic symbol  
logic diagram (positive logic)  
1
1
&
A
2
A
2
B
3
B
3
C
4
C
4
D
8
D
8
5
Y
Y
5
E
6
E
6
F
F
11  
G
12  
H
11  
G
12  
H
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Pin numbers shown are for the D, J, and N packages.  
Copyright 1994, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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