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SN74ALS29827DW PDF预览

SN74ALS29827DW

更新时间: 2024-11-18 22:50:27
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
5页 83K
描述
10-BIT BUFFERS AND BUS DRIVERS WITH 3-STATE OUTPUTS

SN74ALS29827DW 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SO-24针数:24
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:1.23
Is Samacsys:N其他特性:WITH DUAL OUTPUT ENABLE
控制类型:ENABLE LOW计数方向:UNIDIRECTIONAL
系列:ALSJESD-30 代码:R-PDSO-G24
JESD-609代码:e4长度:15.4 mm
负载电容(CL):300 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.048 A湿度敏感等级:1
位数:10功能数量:1
端口数量:2端子数量:24
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP24,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TUBE
峰值回流温度(摄氏度):260最大电源电流(ICC):40 mA
Prop。Delay @ Nom-Sup:23 ns传播延迟(tpd):15 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A宽度:7.5 mm
Base Number Matches:1

SN74ALS29827DW 数据手册

 浏览型号SN74ALS29827DW的Datasheet PDF文件第2页浏览型号SN74ALS29827DW的Datasheet PDF文件第3页浏览型号SN74ALS29827DW的Datasheet PDF文件第4页浏览型号SN74ALS29827DW的Datasheet PDF文件第5页 
SN74ALS29827, SN74ALS29828  
10-BIT BUFFERS AND BUS DRIVERS  
WITH 3-STATE OUTPUTS  
SDAS095B – JANUARY 1986 – REVISED JANUARY 1995  
DW OR NT PACKAGE  
(TOP VIEW)  
Functionally Equivalent to AMD’s AM29827  
and AM29828  
3-State Outputs Drive Bus Lines or Buffer  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
OE1  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
V
CC  
Memory Address Registers  
2
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
Y7  
Y8  
Y9  
Y10  
OE2  
pnp Inputs Reduce dc Loading  
3
Data Flow-Through Pinout (All Inputs on  
4
Opposite Side From Outputs)  
5
6
Power-Up High-Impedance State  
Package Options Include Plastic  
Small-Outline (DW) Packages and Standard  
Plastic (NT) 300-mil DIPs  
7
8
9
10  
11  
12  
A9  
A10  
GND  
description  
These 10-bit buffers and bus drivers provide  
high-performance bus interface for wide data  
paths or buses carrying parity.  
The 3-state control gate is a 2-input NOR such that if either output-enable (OE1 or OE2) input is high, all  
ten outputs are in the high-impedance state.  
The SN74ALS29827 provides true data and the SN74ALS29828 provides inverted data at their respective  
outputs.  
The SN74ALS29827 and SN74ALS29828 are characterized for operation from 0°C to 70°C.  
logic symbols  
SN74ALS29827  
SN74ALS29828  
&
&
1
1
OE1  
OE1  
OE2  
EN  
13  
EN  
13  
OE2  
2
3
4
5
6
7
8
9
23  
22  
21  
20  
19  
18  
17  
16  
2
A1  
3
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
Y7  
Y8  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
Y7  
Y8  
Y9  
Y10  
A2  
4
A3  
5
A4  
6
A5  
7
A6  
8
A7  
9
A8  
10  
A9  
11  
10  
11  
15  
14  
A9  
Y9  
A10  
Y10  
A10  
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74ALS29827DW 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALS29827NT TI

完全替代

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