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SN74ALS1804ADWR PDF预览

SN74ALS1804ADWR

更新时间: 2024-11-27 13:13:47
品牌 Logo 应用领域
德州仪器 - TI 输入元件驱动
页数 文件大小 规格书
4页 59K
描述
ALS SERIES, HEX 2-INPUT NAND GATE, PDSO20, PLASTIC, SO-20

SN74ALS1804ADWR 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.77Is Samacsys:N
其他特性:IOH = 15MA @ VOH = 2V; IOL = 24MA @ VOL = 0.5V系列:ALS
JESD-30 代码:R-PDSO-G20长度:12.8 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
功能数量:6输入次数:2
端子数量:20最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE最大电源电流(ICC):12 mA
传播延迟(tpd):8 ns认证状态:Not Qualified
座面最大高度:2.65 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:7.5 mmBase Number Matches:1

SN74ALS1804ADWR 数据手册

 浏览型号SN74ALS1804ADWR的Datasheet PDF文件第2页浏览型号SN74ALS1804ADWR的Datasheet PDF文件第3页浏览型号SN74ALS1804ADWR的Datasheet PDF文件第4页 
SN54ALS1804A, SN54AS1804, SN74ALS1804A, SN74AS1804  
HEX 2-INPUT NAND DRIVERS  
SDAS042B – AUGUST 1984 – REVISED MAY 1986  
High Capacitive Drive Capability  
SN54ALS1804A, SN54AS1804 . . . J PACKAGE  
SN74ALS1804A, SN74AS1804 . . . DW OR N PACKAGE  
’ALS1804A Has Typical Delay Time of 4 ns  
(TOP VIEW)  
(C = 50 pF) and Typical Power Dissipation  
L
of 3.4 mW per Gate  
5B  
6Y  
6A  
6B  
5A  
5Y  
4B  
4A  
4Y  
GND  
3Y  
3B  
3A  
2Y  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
’AS1804 Has Typical Delay Time of 2.6 ns  
(C = 50 pF) and Typical Power Dissipation  
L
of Less than 9 mW per Gate  
Center V  
and GND Configuration  
Provides Minimum Lead inductance in High  
Current Switching Applications  
V
CC  
CC  
1A  
1B  
1Y  
2A  
2B  
Package Options include Plastic Small  
Outline Packages, Ceramic Chip Carriers,  
and Standard Plastic and Ceramic 300-mil  
DIPs  
Use ’ALS804A or ’AS804 for chip carrier option.  
Dependable Texas Instruments Quality and  
Reliability  
logic symbol  
description  
6
&
1A  
1B  
8
11  
14  
16  
19  
2
These devices contain six independent 2-input  
NAND drivers. They perform the Boolean  
functions Y = AB or Y = A+B in positive logic.  
1Y  
2Y  
3Y  
4Y  
5Y  
6Y  
7
9
2A  
2B  
3A  
3B  
10  
12  
13  
The center pin configuration used in the  
’ALS1804A and ’AS1804 provides a reduction of  
lead inductance when compared to the ’ALS804A  
and ’AS804B. This reduction of lead inductance  
will minimize noise generated onto either the V  
or GND bus. This reduction is significant in high  
current switching applications.  
17  
18  
20  
1
4A  
4B  
5A  
5B  
CC  
3
4
The SN54ALS1804A and SN54AS1804 are  
characterized for operation over the full military  
temperature range of 55°C to 125°C. The  
SN74ALS1804A and SN74AS1804 are charac-  
terized for operation from 0°C to 70°C.  
6A  
6B  
This symbol is in accordance with ANSI/IEEE Std 91-1984  
and IEC Publication 617-12.  
logic diagram (positive logic)  
FUNCTION TABLE  
(each driver)  
1A  
1B  
INPUTS  
OUTPUT  
1Y  
2Y  
3Y  
4Y  
5Y  
6Y  
A
H
L
B
H
X
L
Y
L
2A  
2B  
H
H
X
3A  
3B  
4A  
4B  
5A  
5B  
6A  
6B  
Copyright 1986, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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