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SN74AHCT1G125 PDF预览

SN74AHCT1G125

更新时间: 2024-11-04 23:09:43
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德州仪器 - TI 输出元件
页数 文件大小 规格书
5页 73K
描述
SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

SN74AHCT1G125 数据手册

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SN74AHCT1G125  
SINGLE BUS BUFFER GATE  
WITH 3-STATE OUTPUT  
SCLS378F – AUGUST 1997 – REVISED JANUARY 2000  
DBV OR DCK PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Process  
Inputs Are TTL-Voltage Compatible  
OE  
A
GND  
V
Y
1
2
3
5
4
CC  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Package Options Include Plastic  
Small-Outlline Transistor (DBV, DCK)  
Packages  
description  
The SN74AHCT1G125 is a single bus buffer gate/line driver with 3-state output. The output is disabled when  
the output-enable (OE) input is high. When OE is low, true data is passed from the A input to the Y output.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN74AHCT1G125 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
L
L
H
L
H
X
Z
logic symbol  
1
2
OE  
A
EN  
4
Y
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
logic diagram (positive logic)  
1
2
OE  
A
4
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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