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SN74AHCT174NSRE4 PDF预览

SN74AHCT174NSRE4

更新时间: 2024-11-04 15:52:07
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
16页 559K
描述
AHCT/VHCT/VT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO16, GREEN, PLASTIC, SOP-16

SN74AHCT174NSRE4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP16,.3针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.53系列:AHCT/VHCT/VT
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:10.2 mm负载电容(CL):50 pF
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:65000000 Hz
最大I(ol):0.008 A湿度敏感等级:1
位数:6功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
传播延迟(tpd):10 ns认证状态:Not Qualified
座面最大高度:2 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:5.3 mm最小 fmax:80 MHz
Base Number Matches:1

SN74AHCT174NSRE4 数据手册

 浏览型号SN74AHCT174NSRE4的Datasheet PDF文件第2页浏览型号SN74AHCT174NSRE4的Datasheet PDF文件第3页浏览型号SN74AHCT174NSRE4的Datasheet PDF文件第4页浏览型号SN74AHCT174NSRE4的Datasheet PDF文件第5页浏览型号SN74AHCT174NSRE4的Datasheet PDF文件第6页浏览型号SN74AHCT174NSRE4的Datasheet PDF文件第7页 
SN54AHCT174, SN74AHCT174  
HEX D-TYPE FLIP-FLOPS  
WITH CLEAR  
SCLS419F – JUNE 1998 – REVISED APRIL 2002  
SN54AHCT174 . . . J OR W PACKAGE  
SN74AHCT174 . . . D, DB, DGV, N, NS, OR PW PACKAGE  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
Contain Six Flip-Flops With Single-Rail  
Outputs  
Applications Include:  
– Buffer/Storage Registers  
– Shift Registers  
CLR  
1Q  
1D  
2D  
2Q  
3D  
3Q  
GND  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
6Q  
6D  
5D  
5Q  
4D  
4Q  
CLK  
– Pattern Generators  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
SN54AHCT174 . . . FK PACKAGE  
(TOP VIEW)  
description  
These positive-edge-triggered D-type flip-flops  
have a direct clear (CLR) input.  
3
2
1 20 19  
18 6D  
1D  
2D  
NC  
2Q  
3D  
4
5
6
7
8
Information at the data (D) inputs meeting the  
setup time requirements is transferred to the  
outputs on the positive-going edge of the clock  
(CLK) pulse. Clock triggering occurs at a  
particular voltage level and is not directly related  
to the transition time of the positive-going edge of  
CLK. When CLK is at either the high or low level,  
the D input has no effect at the output.  
17  
5D  
NC  
5Q  
4D  
16  
15  
14  
9 10 11 12 13  
NC – No internal connection  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP – N  
SOIC – D  
Tube  
SN74AHCT174N  
SN74AHCT174N  
Tube  
SN74AHCT174D  
AHCT174  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SN74AHCT174DR  
SN74AHCT174NSR  
SN74AHCT174DBR  
SN74AHCT174PWR  
SN74AHCT174DGVR  
SNJ54AHCT174J  
SNJ54AHCT174W  
SNJ54AHCT174FK  
–40°C to 85°C  
SOP – NS  
AHCT174  
SSOP – DB  
TSSOP – PW  
TVSOP – DGV  
CDIP – J  
HB174  
HB174  
HB174  
SNJ54AHCT174J  
SNJ54AHCT174W  
SNJ54AHCT174FK  
–55°C to 125°C  
CFP – W  
Tube  
LCCC – FK  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2002, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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