5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 总线驱动器/收发器> SN74AHCT16373DGG
SN74AHCT16373DGG PDF预览

SN74AHCT16373DGG

更新时间： 2024-11-03 23:09:43
品牌 Logo 应用领域
德州仪器 - TI 锁存器输出元件
页数 文件大小 规格书
7页 115K
描述
16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

SN74AHCT16373DGG 技术参数

生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP,针数：48
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.68系列：AHCT/VHCT
JESD-30 代码：R-PDSO-G48长度：12.5 mm
逻辑集成电路类型：BUS DRIVER位数：8
功能数量：2端口数量：2
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟（tpd）：10.5 ns
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL宽度：6.1 mm
Base Number Matches：1

SN74AHCT16373DGG 数据手册

 浏览型号SN74AHCT16373DGG的Datasheet PDF文件第2页浏览型号SN74AHCT16373DGG的Datasheet PDF文件第3页浏览型号SN74AHCT16373DGG的Datasheet PDF文件第4页浏览型号SN74AHCT16373DGG的Datasheet PDF文件第5页浏览型号SN74AHCT16373DGG的Datasheet PDF文件第6页浏览型号SN74AHCT16373DGG的Datasheet PDF文件第7页 
SN54AHCT16373, SN74AHCT16373  
16-BIT TRANSPARENT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SCLS336H – MARCH 1996 – REVISED JANUARY 2000  
SN54AHCT16373 . . . WD PACKAGE  
SN74AHCT16373 . . . DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Process  
1OE  
1Q1  
1Q2  
GND  
1Q3  
1Q4  
1LE  
1D1  
1D2  
GND  
1D3  
1D4  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
Inputs Are TTL-Voltage Compatible  
2
3
Distributed V  
High-Speed Switching Noise  
and GND Pins Minimize  
CC  
4
5
Flow-Through Architecture Optimizes PCB  
Layout  
6
V
V
7
CC  
CC  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
1Q5  
1Q6  
GND  
1Q7  
1Q8  
2Q1  
2Q2  
GND  
2Q3  
2Q4  
1D5  
1D6  
GND  
1D7  
1D8  
2D1  
2D2  
GND  
2D3  
2D4  
8
9
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Package Options Include Plastic Shrink  
Small-Outline (DL), Thin Shrink  
Small-Outline (DGG), and Thin Very  
Small-Outline (DGV) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
Using 25-mil Center-to-Center Spacings  
V
V
CC  
CC  
2Q5  
2Q6  
GND  
2Q7  
2Q8  
2OE  
2D5  
2D6  
GND  
2D7  
2D8  
2LE  
description  
The ’AHCT16373 devices are 16-bit transparent  
D-type latches with 3-state outputs designed  
specifically for driving highly capacitive or  
relatively low-impedance loads. They are  
particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
These devices can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high,  
the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up  
at the D inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive  
the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus  
lines without need for interface or pullup components.  
OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while  
the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN54AHCT16373 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74AHCT16373 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 2000, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

中文翻译

下载PDF

与SN74AHCT16373DGG相关器件

型号 品牌 获取价格 描述 数据表
SN74AHCT16373DGGR TI

获取价格

 		16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74AHCT16373DGV TI

获取价格

 		16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74AHCT16373DGVR TI

获取价格

 		16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74AHCT16373DL TI

获取价格

 		16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74AHCT16373DLG4 TI

获取价格

 		16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74AHCT16373DLR TI

获取价格

 		16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74AHCT16374 TI

获取价格

 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74AHCT16374DGG TI

获取价格

 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74AHCT16374DGGR TI

获取价格

 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74AHCT16374DGV TI

获取价格

 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

与SN74AHCT16373DGG相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证