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SN74AHC16541DGV

更新时间： 2024-11-19 22:36:35
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德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
7页 118K
描述
16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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SN74AHC16541DGV 数据手册

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SN54AHC16541, SN74AHC16541  
16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCLS332F – MARCH 1996 – REVISED JANUARY 2000  
SN54AHC16541 . . . WD PACKAGE  
SN74AHC16541 . . . DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Process  
1OE1  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
1OE2  
1A1  
1A2  
1
2
3
4
5
6
7
8
9
48  
47  
46  
Operating Range 2-V to 5.5-V V  
CC  
Distributed V  
High-Speed Switching Noise  
and GND Pins Minimize  
CC  
45 GND  
1A3  
1A4  
44  
43  
42  
41  
40  
Flow-Through Architecture Optimizes PCB  
Layout  
V
V
CC  
CC  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
1Y5  
1Y6  
1A5  
1A6  
Package Options Include Plastic Shrink  
Small-Outline (DL), Thin Shrink  
Small-Outline (DGG), and Thin Very  
Small-Outline (DGV) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
Using 25-mil Center-to-Center Spacings  
GND 10  
39 GND  
1Y7  
1Y8  
1A7  
1A8  
11  
12  
38  
37  
2Y1 13  
2Y2 14  
GND 15  
2Y3 16  
2Y4 17  
36 2A1  
35 2A2  
34 GND  
33 2A3  
32 2A4  
description  
V
18  
31  
V
The ’AHC16541 devices are noninverting 16-bit  
buffers composed of two 8-bit sections with  
separate output-enable signals. For either 8-bit  
buffer section, the two output-enable (1OE1 and  
1OE2 or 2OE1 and 2OE2) inputs must be low for  
the corresponding Y outputs to be active. If either  
output-enable input is high, the outputs of that  
8-bit buffer section are in the high-impedance  
state.  
CC  
CC  
2Y5 19  
2Y6 20  
GND 21  
2Y7 22  
2Y8 23  
2OE1 24  
30 2A5  
29 2A6  
28 GND  
27 2A7  
26 2A8  
25 2OE2  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN54AHC16541 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74AHC16541 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each 8-bit buffer/driver)  
INPUTS  
OUTPUT  
Y
OE2  
L
A
L
OE1  
L
L
H
Z
Z
L
L
H
X
X
H
X
X
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 2000, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

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8-bit 2-V to 5.5-V parallel-in/serial-out shift register

| PW | 16 | -40 to 125

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