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SN74ACT86NSR PDF预览

SN74ACT86NSR

更新时间: 2024-09-29 05:17:59
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路石英晶振光电二极管输入元件
页数 文件大小 规格书
15页 514K
描述
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SN74ACT86NSR 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP-14针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.23Is Samacsys:N
系列:ACTJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:10.3 mm
负载电容(CL):50 pF逻辑集成电路类型:XOR GATE
最大I(ol):0.024 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TR峰值回流温度(摄氏度):260
电源:5 V最大电源电流(ICC):0.04 mA
Prop。Delay @ Nom-Sup:10.5 ns传播延迟(tpd):10.5 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:2 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.3 mm
Base Number Matches:1

SN74ACT86NSR 数据手册

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ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈ ꢉ ꢀꢁꢊ ꢃꢄ ꢅꢆ ꢇꢈ  
ꢋ ꢌꢄꢍꢎ ꢌꢏꢐ ꢑ ꢒ ꢓꢔꢁ ꢏꢌꢆ ꢑꢕ ꢅꢐ ꢌꢀꢔ ꢖꢑꢓꢗ ꢎ ꢘ ꢄꢆꢑ ꢀ  
SCAS534C − AUGUST 1995 − REVISED OCTOBER 2003  
D
D
4.5-V to 5.5-V V  
Operation  
D
D
Max t of 10 ns at 5 V  
pd  
Inputs Are TTL-Voltage Compatible  
CC  
Inputs Accept Voltages to 5.5 V  
SN54ACT86 . . . J OR W PACKAGE  
SN74ACT86 . . . D, DB, N, NS, OR PW PACKAGE  
(TOP VIEW)  
SN54ACT86 . . . FK PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1A  
1B  
1Y  
2A  
2B  
V
CC  
3
2
1
20 19  
18  
4B  
4A  
4Y  
3B  
3A  
3Y  
4A  
NC  
4Y  
NC  
3B  
1Y  
NC  
2A  
4
5
6
7
8
17  
16  
15  
14  
NC  
2B  
2Y  
GND  
8
9 10 11 12 13  
NC − No internal connection  
description/ordering information  
The ’ACT86 devices are quadruple 2-input exclusive-OR gates. The devices perform the Boolean functions  
Y = A B or Y = AB + AB in positive logic.  
A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced  
in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the  
output.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
SOIC − D  
Tube  
SN74ACT86N  
SN74ACT86N  
Tube  
SN74ACT86D  
ACT86  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SN74ACT86DR  
SN74ACT86NSR  
SN74ACT86DBR  
SN74ACT86PW  
SN74ACT86PWR  
SNJ54ACT86J  
SNJ54ACT86W  
SNJ54ACT86FK  
SOP − NS  
ACT86  
AD86  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
AD86  
Tape and reel  
Tube  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54ACT86J  
SNJ54ACT86W  
SNJ54ACT86FK  
Tube  
−55°C to 125°C  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢗ ꢚ ꢥ ꢝ ꢜꢨ ꢣꢢ ꢠꢡ ꢢꢜ ꢞꢥ ꢧꢙ ꢟꢚ ꢠ ꢠꢜ ꢯꢔ ꢐꢓ ꢏꢎ ꢰ ꢓꢱꢇꢂ ꢱꢂꢉ ꢟꢧꢧ ꢥꢟ ꢝ ꢟ ꢞꢤ ꢠꢤꢝ ꢡ ꢟ ꢝ ꢤ ꢠꢤ ꢡꢠꢤ ꢨ  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
ꢣ ꢚꢧ ꢤꢡꢡ ꢜ ꢠꢪꢤ ꢝ ꢬꢙ ꢡꢤ ꢚ ꢜꢠꢤ ꢨꢩ ꢗ ꢚ ꢟꢧ ꢧ ꢜ ꢠꢪꢤ ꢝ ꢥꢝ ꢜ ꢨꢣꢢ ꢠꢡ ꢉ ꢥꢝ ꢜ ꢨꢣꢢ ꢠꢙꢜ ꢚ  
ꢚꢢ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74ACT86NSR 替代型号

型号 品牌 替代类型 描述 数据表
SN74ACT86NSRG4 TI

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TEST-BUS CONTROLLERS IEEE STD 1149.1 JTAG TAP MASTERS WITH 16-BIT GENERIC HOST INTERFACES