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SN74ACT574NSRE4 PDF预览

SN74ACT574NSRE4

更新时间： 2024-11-11 05:17:59
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
15页 526K
描述
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

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中文翻译

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SN74ACT574NSRE4 技术参数

是否Rohs认证：符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP-20
针数：20Reach Compliance Code：compliant
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.18Is Samacsys：N
系列：ACTJESD-30 代码：R-PDSO-G20
JESD-609代码：e4长度：12.6 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
最大频率@ Nom-Sup：85000000 Hz最大I（ol）：0.024 A
湿度敏感等级：1位数：8
功能数量：1端口数量：2
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP20,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：260
电源：5 V传播延迟（tpd）：12 ns
认证状态：Not Qualified座面最大高度：2 mm
子类别：FF/Latches最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：POSITIVE EDGE宽度：5.3 mm
Base Number Matches：1

SN74ACT574NSRE4 数据手册

 浏览型号SN74ACT574NSRE4的Datasheet PDF文件第2页浏览型号SN74ACT574NSRE4的Datasheet PDF文件第3页浏览型号SN74ACT574NSRE4的Datasheet PDF文件第4页浏览型号SN74ACT574NSRE4的Datasheet PDF文件第5页浏览型号SN74ACT574NSRE4的Datasheet PDF文件第6页浏览型号SN74ACT574NSRE4的Datasheet PDF文件第7页 
SN54ACT574, SN74ACT574  
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SCAS537D – OCTOBER 1995 – REVISED NOVEMBER 2002  
SN54ACT574 . . . J OR W PACKAGE  
SN74ACT574 . . . DB, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
4.5-V to 5.5-V V  
Operation  
CC  
Inputs Accept Voltages to 5.5 V  
Max t of 9 ns at 5 V  
pd  
Inputs Are TTL-Voltage Compatible  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
CLK  
description/ordering information  
These 8-bit flip-flops feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. The devices  
are particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
GND  
The eight flip-flops of the ’ACT574 devices are  
D-type edge-triggered flip-flops. On the positive  
transition of the clock (CLK) input, the Q outputs  
are set to the logic levels set up at the data (D)  
inputs.  
SN54ACT574 . . . FK PACKAGE  
(TOP VIEW)  
A buffered output-enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low logic levels) or the  
high-impedance state. In the high-impedance  
state, the outputs neither load nor drive the bus  
lines significantly. The high-impedance state and  
the increased drive provide the capability to drive  
bus lines in a bus-organized system without need  
for interface or pullup components.  
3
2
1
20 19  
18  
4
5
6
7
8
3D  
4D  
5D  
6D  
7D  
2Q  
3Q  
4Q  
5Q  
6Q  
17  
16  
15  
14  
9 10 11 12 13  
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while  
the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PDIP – N  
Tube  
SN74ACT574N  
SN74ACT574N  
Tube  
SN74ACT574DW  
SN74ACT574DWR  
SN74ACT574NSR  
SN74ACT574DBR  
SN74ACT574PWR  
SNJ54ACT574J  
SOIC – DW  
ACT574  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
–40°C to 85°C  
SOP – NS  
SSOP – DB  
TSSOP – PW  
CDIP – J  
ACT574  
AD574  
AD574  
SNJ54ACT574J  
SNJ54ACT574W  
SNJ54ACT574FK  
–55°C to 125°C  
CFP – W  
Tube  
SNJ54ACT574W  
SNJ54ACT574FK  
LCCC – FK  
Tube  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2002, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...15

中文翻译

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SN74ACT574NSRE4 替代型号

型号 品牌 替代类型 描述 数据表
SN74ACT574NSRG4 TI

完全替代

 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ACT574NSR TI

完全替代

 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
MC74ACT574MELG ONSEMI

功能相似

 Octal D Flip−Flop with 3−State Outputs

与SN74ACT574NSRE4相关器件

型号 品牌 获取价格 描述 数据表
SN74ACT574NSRG4 TI

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 		OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ACT574PC FAIRCHILD

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 		Bus Driver, ACT Series, 1-Func, 8-Bit, True Output, CMOS, PQCC20, PLASTIC, DIP-20
SN74ACT574PW TI

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 		OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ACT574PWE4 TI

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 		OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ACT574PWG4 TI

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 		OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ACT574PWLE TI

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 		OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ACT574PWR TI

获取价格

 		OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ACT574PWRE4 TI

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 		OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ACT574PWRG4 TI

获取价格

 		OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ACT574SC FAIRCHILD

获取价格

 		Bus Driver, ACT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 0.300 INCH, PLASTIC, SOP

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